Commits · 8547645948042d5ce4c3ce0a81c9db5eab3564e6 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Dec 10, 2017
- [X86] Flag SLM scheduler model as complete · 85476459
  Simon Pilgrim authored Dec 10, 2017
  85476459
- [X86][AVX[ Tag VZEROALL/VZEROUPPER instructions scheduler classes · 91c159d8
  Simon Pilgrim authored Dec 10, 2017
  91c159d8
- [X86] Tag SSE4A instructions as SSE INTALU scheduler classes · 6de94a1a
  Simon Pilgrim authored Dec 10, 2017
  6de94a1a
- [X86] Flag BTVER2 scheduler model as complete · cd581711
  Simon Pilgrim authored Dec 10, 2017
  cd581711
- [X86] Tag ADJSTACK instructions as INTALU scheduler class · b7fb2e2f
  Simon Pilgrim authored Dec 10, 2017
  b7fb2e2f
- [SCEV] Fix wrong Equal predicate created in getAddRecForPhiWithCasts · 5809e705
  Dorit Nuzman authored Dec 10, 2017
  5809e705
- Fix MSVC 'not all control paths return a value' warning · d038b475
  Simon Pilgrim authored Dec 10, 2017
  d038b475
- [X86] Tag MORESTACK instructions as ret scheduler class · 1a030016
  Simon Pilgrim authored Dec 10, 2017
  1a030016
- [X86] Fix duplicate entries in skylake server scheduler model by changing Z128 to Z256 · 253562eb
  Craig Topper authored Dec 10, 2017
  253562eb
- [X86] Add MOVQI2PQIrm, MOVSDmr, and MOVSDrm to scheduler information · 90c9c159
  Craig Topper authored Dec 10, 2017
  90c9c159
- [X86] Add LEA64_32r to scheduler models for Sandybridge,Haswell,Broadwell,Skylake · 28e55386
  Craig Topper authored Dec 10, 2017
  28e55386
- [X86] Add IN16/OUT16 to scheduling information for Haswell,Broadwell,Skylake · 8ade4640
  Craig Topper authored Dec 10, 2017
  8ade4640
- [X86] Fix scheduler models to support ADD32ri in addition to ADD32ri8. Similar... · 1a88c50f
  Craig Topper authored Dec 10, 2017
  1a88c50f
- [X86] Rename some instructions so that 'b' is added as a suffix instead of replacing an 'r' · c89e282f
  Craig Topper authored Dec 10, 2017
  c89e282f
- [X86] Add CMPSDrr/rm to the scheduler models. · 6c659101
  Craig Topper authored Dec 10, 2017
  6c659101
- [Docs] Fix typo in scheduler model documentation. enumemation->enumeration · d435a195
  Craig Topper authored Dec 10, 2017
  d435a195
- PowerPC: support external pid instructions in MC layer. · cf4701bb
  Tim Northover authored Dec 10, 2017
  cf4701bb
- PPC32: Support R_PPC_PLTREL32 in static mode. · 8f1bc370
  Tim Northover authored Dec 10, 2017
  8f1bc370
- [PGO] change arg type to uint64_t to match member field type · fa3f1a15
  Xinliang David Li authored Dec 10, 2017
  fa3f1a15
- Update another sanitizer test for C++14. · 7008c6bc
  Ahmed Bougacha authored Dec 10, 2017
  7008c6bc
- [X86] Rename the rb form of scalar ADD/SUB/MUL/DIV to include _Int since they... · da7e78e1
  Craig Topper authored Dec 10, 2017
  da7e78e1
- [X86] Correct the _Int part of more scheduler model instrexes. Put _b in the... · 4e57776f
  Craig Topper authored Dec 10, 2017
  4e57776f
- [X86] Remove ReadAfterLd from several several rb instructions · a2f55280
  Craig Topper authored Dec 10, 2017
  a2f55280
- [X86] Fix test case I failed ot update in r320279. · 29868dcb
  Craig Topper authored Dec 10, 2017
  29868dcb
- [X86] Fix bad regular expressions in the scheduler models. Question marks... · 391c6f95
  Craig Topper authored Dec 10, 2017
  391c6f95
- [X86] Make the _Int part of some instregex sheduler patterns optional · 8ee98d0b
  Craig Topper authored Dec 10, 2017
  8ee98d0b
- [X86] Add the commutable floating point min/max pseudo instructions to... · 5ffe8010
  Craig Topper authored Dec 10, 2017
  5ffe8010
- [X86] Tag PIC setup instruction as jump scheduler class · 6655eef1
  Simon Pilgrim authored Dec 10, 2017
  6655eef1
- [X86] Tag ACQUIRE/RELEASE atomic instructions as microcoded scheduler classes · 5d74949e
  Simon Pilgrim authored Dec 10, 2017
  5d74949e
- [X86] Tag TLS instructions as system scheduler classes · dcbe723d
  Simon Pilgrim authored Dec 10, 2017
  dcbe723d
- [X86] Tag ALLOCA/VAARG instructions as system scheduler classes · 3508a094
  Simon Pilgrim authored Dec 10, 2017
  3508a094
- [AArch64] Improve loop unrolling performance on Cavium T99 · 5cc21e83
  Joel Jones authored Dec 09, 2017
  5cc21e83
- Update Clang CMake cache to use cxx-headers, NFC · 6c63b07a
  Duncan P. N. Exon Smith authored Dec 09, 2017
  6c63b07a
- [InstCombine] Fix SimplifyDemandedUseBits SHL handling (PR35515) · a42a5425
  Simon Pilgrim authored Dec 09, 2017
  a42a5425
- Infer lowest bits of an integer Multiply when the low bits of the operands are known · 70dbd5fb
  Simon Dardis authored Dec 09, 2017
  70dbd5fb
- [X86] Use KMOV instructions to zero upper bits of vectors when possible. · f4e3044d
  Craig Topper authored Dec 09, 2017
  f4e3044d
Dec 09, 2017
- [X86] Improve lowering of vXi1 insert_subvectors to better utilize... · 5ac75d56
  Craig Topper authored Dec 09, 2017
  5ac75d56
- [X86] Tag LOCK/REX64/DATA16/DATA32 instruction prefix scheduler classes · e0490386
  Simon Pilgrim authored Dec 09, 2017
  e0490386
- Strip trailing whitespace. NFCI. · b2b93f62
  Simon Pilgrim authored Dec 09, 2017
  b2b93f62
- [X86] Tag FS/GS BASE R/W instruction scheduler classes · 7e636cc4
  Simon Pilgrim authored Dec 09, 2017
  7e636cc4