llvm-svn: 132097

llvm-svn: 132087

llvm-svn: 132086

them.

I had to add a special SwitchSectionNoChange method to MCStreamer just for
.seh_handlerdata. If this isn't OK, please let me know, and I'll find some
other way to fix .seh_handlerdata streaming.

llvm-svn: 132084

llvm-svn: 132083

Part of rdar://9119939

llvm-svn: 132081

been defined in MipsInstrFPU.td.

llvm-svn: 132076

llvm-svn: 132074

llvm-svn: 132073

llvm-svn: 132071

llvm-svn: 132070

return 0 if there are no function calls made. 

llvm-svn: 132065

llvm-svn: 132063

llvm-svn: 132062

'void (__cdecl *)()' differs in parameter lists from 'void (__cdecl *)(void)'

atexit really expects a "void f(void)" function.

llvm-svn: 132061

MSVC doesn't support 64 bit enum. 
OpcodeMask is not used anywhere in the code base.

llvm-svn: 132057

I kept the reference to the ABI since that is the common case. The
-fno-asynchronous-unwind-tables option is a user controlled way of breaking
the ABI.

llvm-svn: 132053

Fix warning in the CMake build about redefining LLVM_PATH_XDOT_PY by making sure both definitions are identical. This used to produce warnings like

In file included from .../llvm/trunk/tools/lto/LTOCodeGenerator.cpp:45:
In file included from .../llvm/trunk/include/llvm/Support/system_error.h:225:
.../include/llvm/Config/config.h:591:9: warning: 'LLVM_PATH_XDOT_PY' macro redefined
#define LLVM_PATH_XDOT_PY ".../bin/xdot.py"
        ^
.../include/llvm/Config/llvm-config.h:98:9: note: previous definition is here
#define LLVM_PATH_XDOT_PY ""
        ^
1 warning generated.

(Paths edited for clarity)

Note: This only affected people who had xdot.py installed.
llvm-svn: 132050

-Emit an empty warning option as string ("") instead of 0.
-For diagnostic names also emit the size of the string.

llvm-svn: 132046

buggy methods that parse these directives.

llvm-svn: 132045

llvm-svn: 132044

llvm-svn: 132043

fixes <rdar://problem/9495913>

llvm-svn: 132042

target register, matching BX. I filed this bug because I was confused at first:

PR10007 - ARM branch instructions have inconsistent predicate operand placement
<http://llvm.org/bugs/show_bug.cgi?id=10007>

llvm-svn: 132041

llvm-svn: 132040

reflect their actual meaning and match the ARM instructions.

llvm-svn: 132039

cleanup and overdue test cases.

llvm-svn: 132038

one I found by inspection).

llvm-svn: 132037

LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.

llvm-svn: 132033

llvm-svn: 132030

method exposed by the test. While we're at it, simplify the .seh_proc
parsing method.

llvm-svn: 132028

Enable the parsing of the operand "cpsr_all" for the ARM msr instruction

llvm-svn: 132026

llvm-svn: 132025

Part of rdar://9119939

llvm-svn: 132024

Part of rdar://9119939

llvm-svn: 132023

case of a switch instruction. Back off this optimization when this would
eliminate all of the predecessors to the latch.

Sorry, I am unable to reduce a reasonably sized test case.

rdar://9486843

llvm-svn: 132022

do.

Part of rdar://9119939.

llvm-svn: 132015

Fixes part of rdar://9444657

llvm-svn: 132011

llvm-svn: 132010

llvm-svn: 132005