Upon further review, most of the EH code should remain written at the IR
level. The part which breaks SSA form is the dispatch table, so that part will
be moved to the back-end.

llvm-svn: 140730

some arguments types are ns_consumed and some otherwise
matching types are not. This is objc side of
// rdar://10187884

llvm-svn: 140729

llvm-svn: 140728

llvm-svn: 140726

llvm-svn: 140725

Attempt to enable locale simplification.  On which platforms can we now #define _LIBCPP_STABLE_APPLE_ABI?

llvm-svn: 140724

llvm-svn: 140723

llvm-svn: 140722

llvm-svn: 140721

NULL cannot be portably used as the last argument to a function with __attribute((sentinel)), even though it usually works.  Use (void*)0 instead.  PR11002.

llvm-svn: 140720

llvm-svn: 140719

llvm-svn: 140718

some arguments types are ns_consumed and some otherwise
matching types are not. This fixes the objc++ side only *auch*.
// rdar://10187884

llvm-svn: 140717

llvm-svn: 140716

llvm-svn: 140715

llvm-svn: 140714

Tweak -Wobjc-missing-super-calls to not warning about missing [super dealloc] when in GC-only mode, and to not warning about missing [super finalize] when not using GC.

llvm-svn: 140713

Add llvm-cov skeleton. It has initial support to read coverage info generated by GCOVProfiling.cpp. 
Today, you can do
prompt> clang a.c -ftest-coverage -fprofile-arcs -o a
prompt> ./a
prompt> llvm-cov -gcno a.gcno -gcda a.gcda 
a.c
 :	#include "a.h"
 :	
 :	int main() {
 :		int i = 0;
 :		if (i) {
1:			int j = 0;
1:			j = 1;
1:		} else {
 :			int k = 1;
 :			k = 2;
 :		}
1:		return 0;
 :	}
 :	
 :	

llvm-svn: 140712

llvm-svn: 140711

end address is an LLDB_INVALID_ADDRESS.  Modify the test case to dump
all the symbols in all the sections.

llvm-svn: 140710

llvm-svn: 140709

llvm-svn: 140708

llvm-svn: 140707

llvm-svn: 140706

llvm-svn: 140705

llvm-svn: 140704

llvm-svn: 140703

hash tables. Renamed the DWARF sections to ".apple_names" and
".apple_types" until we get more buy in from other vendors.

llvm-svn: 140702

Handle general Add expressions to avoid leaving around redundant
32-bit IVs.

llvm-svn: 140701

llvm-svn: 140700

Get rid of some of the no-longer-needed parts of PTXAsmPrinter.

llvm-svn: 140698

Lay some groundwork for converting to MC-based asm printer. This is the first
of probably many patches to bring the back-end back up-to-date with all of the
recent MC changes.

llvm-svn: 140697

Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format.

Add decoder and disassembler tests.

Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT.

llvm-svn: 140696

handling with references to 
http://sourcery.mentor.com/public/cxx-abi/abi-eh.html (r 1.22).

llvm-svn: 140695

llvm-svn: 140694

llvm-svn: 140693

predefines based on the output of GCC as well as the CPU predefines.

Invert tests for __AVX__, Clang's AVX feature is hard coded off still.

Switch Atom from 'SSE3' to 'SSSE3'. This matches GCC's behavior, Intel's
documentation, and ICC's documentation (such as I could dig up).

Switch Athlon and Geode to enable 3dnowa rather than just 3dnow and
nothing (resp.).

llvm-svn: 140692

automate the process of updating and generating these tests.

If anyone is really interested, I can check my scripts for generating
this test in, but its a horrible pile of shell... Not sure its really
worth it.

llvm-svn: 140691

__tune_...__ define as well.

llvm-svn: 140690

the target identifying macros at the top, including subtarget macros.

llvm-svn: 140689