Commits · 8abf65a1309987b52390b356eff53999df261364 · Roger Ferrer / llvm-epi-0.8

Dec 06, 2011

Probably not a good idea to convert a single vector load into a memcpy. We · 8abf65a1

Chad Rosier authored Dec 06, 2011

don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://9892684

llvm-svn: 145879

8abf65a1

Dec 05, 2011
- Make the MemCpyOptimizer a bit more aggressive. I can't think of a scenerio · 19446a07
  Chad Rosier authored Dec 05, 2011
```
where this would be bad as the backend shouldn't have a problem inlining small
memcpys.
rdar://10510150

llvm-svn: 145865
```
  19446a07
- Tweak ADDrr fix. Bad check for explicit .w · b8c719cc
  Jim Grosbach authored Dec 05, 2011
```
llvm-svn: 145863
```
  b8c719cc
- Update tests for r145860. Add a few new ones. · 8b5e9257
  Jim Grosbach authored Dec 05, 2011
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llvm-svn: 145861
```
  8b5e9257
- Add definitions of 64-bit extract and insert instrucions and make · 20cee2eb
  Akira Hatanaka authored Dec 05, 2011
```
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.

llvm-svn: 145853
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  20cee2eb
- Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions. · ec9ba982
  Jim Grosbach authored Dec 05, 2011
```
rdar://10529348

llvm-svn: 145851
```
  ec9ba982
- Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and · 34e3df76
  Akira Hatanaka authored Dec 05, 2011
```
O32 with relocation-model=pic too.

llvm-svn: 145850
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  34e3df76
- ARM assembly parsing for the rest of the VMUL data type aliases. · fdf9e158
  Jim Grosbach authored Dec 05, 2011
```
Finish up rdar://10522016.

llvm-svn: 145846
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  fdf9e158
- Add test case - this input used to crash because of duplicate generation of SPILL_CRs · 97a6028b
  Hal Finkel authored Dec 05, 2011
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llvm-svn: 145820
```
  97a6028b
- enable PPC register scavenging by default (update tests and remove some FIXMEs) · 8f6834df
  Hal Finkel authored Dec 05, 2011
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llvm-svn: 145819
```
  8f6834df
- remove wasted space for extra bit copies of CR2 subregs · e18c7268
  Hal Finkel authored Dec 05, 2011
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llvm-svn: 145817
```
  e18c7268
- test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux. · e6efe405
  NAKAMURA Takumi authored Dec 05, 2011
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llvm-svn: 145805
```
  e6efe405
- · 3924cb02
  Nadav Rotem authored Dec 05, 2011
```
Add support for vectors of pointers.

llvm-svn: 145801
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  3924cb02
Dec 04, 2011
- Emit the ctors in the proper order on ARM/EABI. · 965e0c6d
  Anton Korobeynikov authored Dec 03, 2011
```
Maybe some targets should use this as well.

Patch by Evgeniy Stepanov!

llvm-svn: 145781
```
  965e0c6d
Dec 03, 2011

Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since · 6dae604f
Venkatraman Govindaraju authored Dec 03, 2011
```
AnalyzeBranch doesn't change the successor, just the order.

llvm-svn: 145779
```
6dae604f

Check for stack space more intelligently. · 006e43bc

Sanjoy Das authored Dec 03, 2011

libgcc sets the stack limit field in TCB to 256 bytes above the actual
allocated stack limit.  This means if the function's stack frame needs
less than 256 bytes, we can just compare the stack pointer with the
stack limit.  This should result in lesser calls to __morestack.

llvm-svn: 145766

006e43bc

Fix a bug in the x86-32 code generated for segmented stacks. · 165ca1d4

Sanjoy Das authored Dec 03, 2011

Currently LLVM pads the call to __morestack with a add and sub of 8
bytes to esp.  This isn't correct since __morestack expects the call
to be followed directly by a ret.

This commit also adjusts the relevant test-case.

llvm-svn: 145765

165ca1d4

[arm-fast-isel] Unaligned stores of floats require special care. · ec3b77e0
Chad Rosier authored Dec 03, 2011
```
rdar://10510150

llvm-svn: 145742
```
ec3b77e0

Fixed deadstoreelimination bug where negative indices were incorrectly causing... · e03fe83d

Pete Cooper authored Dec 03, 2011

Fixed deadstoreelimination bug where negative indices were incorrectly causing the optimisation to occur

Turns out long long + unsigned long long is unsigned.  Doh!

Fixes http://llvm.org/bugs/show_bug.cgi?id=11455

llvm-svn: 145731

e03fe83d

Add support for constant folding the pow intrinsic. · 0155a635
Chad Rosier authored Dec 03, 2011
```
rdar://10514247

llvm-svn: 145730
```
0155a635

Dec 02, 2011
- Test cases for 64-bit multiplication and division. · 430f917f
  Akira Hatanaka authored Dec 02, 2011
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llvm-svn: 145717
```
  430f917f
- Fix test cases to use FileCheck. · bbc5555b
  Akira Hatanaka authored Dec 02, 2011
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llvm-svn: 145716
```
  bbc5555b
- ARM tests for VLD1 single lane w/ writeback. · 7276397f
  Jim Grosbach authored Dec 02, 2011
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llvm-svn: 145713
```
  7276397f
- [arm-fast-isel] After promoting a function parameter be sure to update the · 9fd0e55e
  Chad Rosier authored Dec 02, 2011
```
argument value type.  Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467

llvm-svn: 145701
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  9fd0e55e
- specify cpu for test to fix failure on some darwin systems with a g4+ cpu · d87f7af1
  Hal Finkel authored Dec 02, 2011
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llvm-svn: 145699
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  d87f7af1
- Clean up aliases for ARM VLD1 single-lane assembly parsing a bit. · e7dcbc86
  Jim Grosbach authored Dec 02, 2011
```
Add the 16-bit lane variants while I'm at it.

llvm-svn: 145693
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  e7dcbc86
- Add instruction selection support for horizontal add/sub of 256-bit floating... · abeb79ee
  Craig Topper authored Dec 02, 2011
```
Add instruction selection support for horizontal add/sub of 256-bit floating point vectors. Also add the test case for 256-bit integer vectors.

llvm-svn: 145680
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  abeb79ee
- adjust the instruction ordering in some PPC tests: changes due to postRA haz. rec. · 92867059
  Hal Finkel authored Dec 02, 2011
```
llvm-svn: 145678
```
  92867059
Dec 01, 2011
- Prevent library calls from being folded if -fno-builtin has been specified. · 3367123b
  Chad Rosier authored Dec 01, 2011
```
rdar://10500969

llvm-svn: 145639
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  3367123b
- Improved fix for abs(val) != 0 to check other similar case. Also fixed style... · fdddc271
  Pete Cooper authored Dec 01, 2011
```
Improved fix for abs(val) != 0 to check other similar case.  Also fixed style issues and confusing comment

llvm-svn: 145618
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  fdddc271
- For 64-bit the rest of the general regs are ok for the q constraint. Make · 9da7f305
  Eric Christopher authored Dec 01, 2011
```
sure we can emit both the high and low versions of those registers.

Fixes rdar://10392864

llvm-svn: 145579
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  9da7f305
- Pass AVX vectors which are arguments to varargs functions on the stack. <rdar://problem/10463281>. · d61887dd
  Eli Friedman authored Dec 01, 2011
```
llvm-svn: 145573
```
  d61887dd
- Removed use of grep from test and moved it to be with other icmp tests · 3b7f35bf
  Pete Cooper authored Dec 01, 2011
```
llvm-svn: 145570
```
  3b7f35bf
- Added instcombine pattern to spot comparing -val or val against 0. · bc5c524b
  Pete Cooper authored Dec 01, 2011
```
(val != 0) == (-val != 0) so "abs(val) != 0" becomes "val != 0"

Fixes <rdar://problem/10482509>

llvm-svn: 145563
```
  bc5c524b
Nov 30, 2011
- Support for encoding all FMA4 instructions and tablegen patterns for all · 9430e284
  Jan Sjödin authored Nov 30, 2011
```
remaining FMA4 instructions and intrinsics with tests.

llvm-svn: 145525
```
  9430e284
- Make GlobalMerge honor the preferred alignment on globals without an... · 6cff9df2
  Eli Friedman authored Nov 30, 2011
```
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.

<rdar://problem/10497732>.

llvm-svn: 145523
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  6cff9df2
- Add some tests for all-lanes VLD1 parsing. · 7d8517b1
  Jim Grosbach authored Nov 30, 2011
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llvm-svn: 145512
```
  7d8517b1
- Add test arch to make it pass on non x86 targets · 0a180101
  Nadav Rotem authored Nov 30, 2011
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llvm-svn: 145498
```
  0a180101
- Add a tripple to the test · 66427bcc
  Nadav Rotem authored Nov 30, 2011
```
llvm-svn: 145489
```
  66427bcc
- X86: PerformOrCombine introduced a vselect node with a wrong order of... · 96923cc2
  Nadav Rotem authored Nov 30, 2011
```
X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).

llvm-svn: 145488
```
  96923cc2