llvm-svn: 31833

clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.

llvm-svn: 31832

llvm-svn: 31830

llvm-svn: 31829

llvm-svn: 31828

llvm-svn: 31827

llvm-svn: 31826

llvm-svn: 31825

2. Offsets on 64-bit stores are still in bytes.

llvm-svn: 31824

llvm-svn: 31823

llvm-svn: 31822

llvm-svn: 31821

llvm-svn: 31820

llvm-svn: 31819

of the icky <iostream> class.

llvm-svn: 31818

soon replace all uses of those objects.

llvm-svn: 31817

llvm-svn: 31816

llvm-svn: 31815

llvm-svn: 31814

llvm-svn: 31813

llvm-svn: 31812

llvm-svn: 31811

llvm-svn: 31810

and handle it like constant stride vars.  This fixes some bad codegen in
variable stride cases.  For example, it compiles this:

void foo(int k, int i) {
  for (k=i+i; k <= 8192; k+=i)
    flags2[k] = 0;
}

to:

LBB1_1: #bb.preheader
        movl %eax, %ecx
        addl %ecx, %ecx
        movl L_flags2$non_lazy_ptr, %edx
LBB1_2: #bb
        movb $0, (%edx,%ecx)
        addl %eax, %ecx
        cmpl $8192, %ecx
        jle LBB1_2      #bb
LBB1_5: #return
        ret

or (if the array is local and we are in dynamic-nonpic or static mode):

LBB3_2: #bb
        movb $0, _flags2(%ecx)
        addl %eax, %ecx
        cmpl $8192, %ecx
        jle LBB3_2      #bb

and:

        lis r2, ha16(L_flags2$non_lazy_ptr)
        lwz r2, lo16(L_flags2$non_lazy_ptr)(r2)
        slwi r3, r4, 1
LBB1_2: ;bb
        li r5, 0
        add r6, r4, r3
        stbx r5, r2, r3
        cmpwi cr0, r6, 8192
        bgt cr0, LBB1_5 ;return

instead of:

        leal (%eax,%eax,2), %ecx
        movl %eax, %edx
        addl %edx, %edx
        addl L_flags2$non_lazy_ptr, %edx
        xorl %esi, %esi
LBB1_2: #bb
        movb $0, (%edx,%esi)
        movl %eax, %edi
        addl %esi, %edi
        addl %ecx, %esi
        cmpl $8192, %esi
        jg LBB1_5       #return

and:

        lis r2, ha16(L_flags2$non_lazy_ptr)
        lwz r2, lo16(L_flags2$non_lazy_ptr)(r2)
        mulli r3, r4, 3
        slwi r5, r4, 1
        li r6, 0
        add r2, r2, r5
LBB1_2: ;bb
        li r5, 0
        add r7, r3, r6
        stbx r5, r2, r6
        add r6, r4, r6
        cmpwi cr0, r7, 8192
        ble cr0, LBB1_2 ;bb

This speeds up Benchmarks/Shootout/sieve from 8.533s to 6.464s and
implements LoopStrengthReduce/var_stride_used_by_compare.ll

llvm-svn: 31809

llvm-svn: 31808

premature, these libraries will be going away for the 2.0 release. Other
arrangements for profiling, gc, etc. should be made in the next few months.

llvm-svn: 31807

llvm-svn: 31806

llvm-svn: 31805

llvm-svn: 31804

llvm-svn: 31803

llvm-svn: 31802

llvm-svn: 31801

a #include of iostream.

llvm-svn: 31800

llvm-svn: 31799

stream. It centralizes the use of std::cerr so that static c'tor/d'tors
aren't scattered around all over the place. The way to use it is like this:

       DOUT << "This is a status line: " << Var << "\n";

If "-debug" is specified, it will print. Otherwise, it'll not print. If
NDEBUG is defined, the DOUT does nothing.

llvm-svn: 31798

llvm-svn: 31797

llvm-svn: 31796

Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.

llvm-svn: 31795

llvm-svn: 31794

be dropped. This patch pertains to removing the runtime directory from LLVM.

llvm-svn: 31793