and the JITted code are managed by a standalone
class that handles memory management itself.

I have removed RecordingMemoryManager and
ProcessDataAllocator, which filled similar roles
and had confusing ownership, with a common class
called IRExecutionUnit.  The IRExecutionUnit
manages all allocations ever made for an expression
and frees them when it goes away.  It also contains
the code generator and can vend the Module for an
expression to other clases.

The end goal here is to make the output of the
expression parser re-usable; that is, to avoid
re-parsing when re-parsing isn't necessary.

I've also cleaned up some code and used weak pointers
in more places.  Please let me know if you see any
leaks; I checked myself as well but I might have
missed a case.

llvm-svn: 177364

llvm-svn: 177363

it wasn't taking into account that the float should be truncated *before* the
range check happens. Thus (unsigned)-0.99 and (unsigned char)255.9 have defined
behavior and should not be trapped.

llvm-svn: 177362

Don't sign extend the immediate value from the OR instruction in
an LIS/OR pair.

llvm-svn: 177361

llvm-svn: 177360

llvm-svn: 177359

top-level HeaderDoc tags @functiongroup and
@methodgroup to doc. tags recognized.
// rdar://12379114 

llvm-svn: 177358

Also remove unneeded #include and forward declaration.

llvm-svn: 177357

llvm-svn: 177356

llvm-svn: 177355

llvm-svn: 177354

Splitting the graph trimming and the path-finding (r177216) already
recovered quite a bit of performance lost to increased suppression.
We can still do better by also performing the reverse BFS up front
(needed for shortest-path-finding) and only walking the shortest path
for each report. This does mean we have to walk back up the path and
invalidate all the BFS numbers if the report turns out to be invalid,
but it's probably still faster than redoing the full BFS every time.

More performance work for <rdar://problem/13433687>

llvm-svn: 177353

Also, replace a std::string with a SmallString.

No functionality change.

llvm-svn: 177352

llvm-svn: 177351

llvm-svn: 177350

llvm-svn: 177349

llvm-svn: 177348

parsed one.  Test case coming shortly.
rdar://13446980

llvm-svn: 177347

llvm-svn: 177346

The previous implementation missed the case where the elif condition was
evaluated from the context of an #ifdef that was false causing PR15539.

llvm-svn: 177345

llvm-svn: 177344

llvm-svn: 177343

llvm-svn: 177342

llvm-svn: 177341

For each compile unit, we want to register a function that will flush that
compile unit. Otherwise, __gcov_flush() would only flush the counters within the
current compile unit, and not any outside of it.

PR15191 & <rdar://problem/13167507>

llvm-svn: 177340

llvm-svn: 177339

PPC64 supports unaligned loads and stores of 64-bit values, but
in order to use the r+i forms, the offset must be a multiple of 4.
Unfortunately, this cannot always be determined by examining the
immediate itself because it might be available only via a TOC entry.

In order to get around this issue, we additionally predicate the
selection of the r+i form on the alignment of the load or store
(forcing it to be at least 4 in order to select the r+i form).

llvm-svn: 177338

The __llvm_gcov_flush() functions only work for the local compile unit. However,
when __gcov_flush() is called, the user expects all of the counters to be
flushed, not just the ones in the current compile unit.

This adds some library functions that register the flush functions. It also
defined __gcov_flush() so that loops through that list and calls the functions.

PR15191 & <rdar://problem/13167507>

llvm-svn: 177337

Issue reported by Tom Honermann!
http://llvm.org/bugs/show_bug.cgi?id=15377

llvm-svn: 177336

Add missing diagnostic for a nested-name-specifier on a free-standing type definition. Bump some related diagnostics from warning to extension in C++, since they're errors there. Add some missing checks for function specifiers on non-function declarations.

llvm-svn: 177335

The default logic marks them as too expensive.

For example, before this patch we estimated:
  cost of 16 for instruction:   %r = uitofp <4 x i16> %v0 to <4 x float>

While this translates to:
  vmovl.u16 q8, d16
  vcvt.f32.u32  q8, q8

All other costs are left to the values assigned by the fallback logic. Theses
costs are mostly reasonable in the sense that they get progressively more
expensive as the instruction sequences emitted get longer.

radar://13445992

llvm-svn: 177334

Fix cost of some "cheap" cast instructions. Before this patch we used to
estimate for example:
  cost of 16 for instruction:   %r = fptoui <4 x float> %v0 to <4 x i16>

While we would emit:
  vcvt.s32.f32  q8, q8
  vmovn.i32 d16, q8
  vuzp.8  d16, d17

All other costs are left to the values assigned by the fallback logic. Theses
costs are mostly reasonable in the sense that they get progressively more
expensive as the instruction sequences emitted get longer.

radar://13434072

llvm-svn: 177333

- don't use preprocessor macros
- use switch statements
- don't put anything in the lldb namespace, use "lldb_perf" namespace.
- Pass the action struct into each TestStep() for each step fill in
- Modify the ActionWanted class to have accessors to make the continue, next, finish, kill instead of using preproc macros

llvm-svn: 177332

Also add some checks to not merge globals used within landing pad instructions or marked as "used".

llvm-svn: 177331

Report and suggested fix by Tom Honermann!
http://llvm.org/bugs/show_bug.cgi?id=13020

llvm-svn: 177330

I have filed http://llvm.org/bugs/show_bug.cgi?id=15538 against clang.
This code is safer anyway because "cast" assumes you really know that
it's okay to make the cast. In this case isa should not be false and
dyn_cast should not return null as far as I understand. But everything
else is valid so I did not want to revert my previous patch for attributes
mips16/nomips16 or use an llvm_unreachable here which would make a number
of our tests fail for mips.

llvm-svn: 177329

Hal Finkel recently added code to allow unaligned memory references
for PowerPC.  Two tests were temporarily modified with
-disable-ppc-unaligned to keep them from failing.  This patch adjusts
the expected code generation for the unaligned references.

llvm-svn: 177328

llvm-svn: 177327

We hitch a ride with the existing OpndItins class that was used to add
instruction itinerary classes in the many multiclasses in this file.

Use the link provided by the X86FoldableSchedWrite.Folded to find the
right SchedWrite for folded loads.

llvm-svn: 177326

llvm-svn: 177325