llvm-svn: 146037

"opt -std-compile-opts".

llvm-svn: 146036

Fix a bunch of SSE/AVX patterns to use proper memop types. In particular, not using integer loads other than v2i64/v4i64 since the others are all promoted.

llvm-svn: 146031

llvm-svn: 146030

llvm-svn: 146029

generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026

llvm-svn: 146025

make CR spill and restore 64-bit clean (no functional change), and fix some other problems found with -verify-machineinstrs

llvm-svn: 146024

llvm-svn: 146023

llvm-svn: 146022

llvm-svn: 146021

The block offset can be computed from the previous block. That is more
robust than keeping track of a delta.

Eliminate one redundant AdjustBBOffsetsAfter call.

llvm-svn: 146018

These fields are not used for anything yet.

llvm-svn: 146017

Zap unnecessary isIntDivCheap() check.  PR11485.  No testcase because this doesn't affect any in-tree target.

llvm-svn: 146015

The TokenAlias handling of data type suffices renders these unnecessary.

llvm-svn: 146010

llvm-svn: 146008

Data type suffix aliasing. Previously handled via lots of instruction
aliases. Cleanup of those forthcoming.

rdar://10435076

llvm-svn: 146007

No functional change is intended.

llvm-svn: 146005

llvm-svn: 146004

llvm-svn: 146003

llvm-svn: 146001

make the addend fixup code a bit more generic

Patch by Jack Carter.

llvm-svn: 145998

This flag is used when bundling machine instructions.  It indicates
whether the operand reads a value defined inside or outside its bundle.

llvm-svn: 145997

llvm-svn: 145996

llvm-svn: 145995

No functional change yet. Will be implementing range-checked immediates
for better diagnostics and disambiguation of instructions.

llvm-svn: 145994

- Remove unused types/fields.
- Add some constantness.

llvm-svn: 145993

For example, ARM allows:
    vmov.u32 s4, #0  -> vmov.i32, #0
'u32' is a more specific designator for the 32-bit integer type specifier
and is legal for any instruction which accepts 'i32' as a datatype suffix.

We want to say,
    def : TokenAlias<".u32", ".i32">;

This works by marking the match class of 'From' as a subclass of the
match class of 'To'.

rdar://10435076

llvm-svn: 145992

llvm-svn: 145991

multiple components.

llvm-svn: 145989

llvm-svn: 145988

This caused more offset errors.

llvm-svn: 145980

llvm-svn: 145979

llvm-svn: 145977

llvm-svn: 145976

1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs

llvm-svn: 145975

llvm-svn: 145974

This pseudo-instruction contains a .align directive in its expansion, so
the total size may vary by 2 bytes.

It is too difficult to accurately keep track of this alignment
directive, just use the worst-case size instead.

llvm-svn: 145971

ARMConstantIslandPass may sometimes leave empty constant islands behind
(it really shouldn't). Remove the alignment from the empty islands so
the size calculations are still correct.

This should fix the many Thumb1 assembler errors in the nightly test
suite.

The reduced test case for this problem is way too big. That is to be
expected for ARMConstantIslandPass bugs.

<rdar://problem/10534709>

llvm-svn: 145970

llvm-svn: 145969