would have been a Godsend here!

llvm-svn: 47625

llvm-svn: 47300

llvm-svn: 46930

llvm-svn: 46667

nop. Emit the nop directly for PPC.

llvm-svn: 46398

llvm-svn: 46199

llvm-svn: 45605

e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464

Use MachineOperand::getImm instead of MachineOperand::getImmedValue.  Likewise setImmedValue -> setImm

llvm-svn: 45453

llvm-svn: 45418

for Darwin PPC, but it's not fully working yet.

llvm-svn: 44258

llvm-svn: 44128

to all targets uses GOT-relative offsets for PIC (Alpha?)

llvm-svn: 44108

MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.

llvm-svn: 44104

llvm-svn: 43955

Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

llvm-svn: 43924

Evan, please review this.

llvm-svn: 43680

b/h/w/k/q inline asm memory modifiers, which are just ignored.  This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll

llvm-svn: 43430

llvm-svn: 42960

function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908

for consistency.

llvm-svn: 42637

of comparing begin() and end().

llvm-svn: 42585

isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958

that global stub instead of doing the ".set" thingy we were doing before.

llvm-svn: 41838

llvm-svn: 40672

llvm-svn: 40594

Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource.

llvm-svn: 40578

llvm-svn: 40501

llvm-svn: 40499

llvm-svn: 40441

llvm-svn: 37716

llvm-svn: 37574

llvm-svn: 37419

some small cleanup was made.

llvm-svn: 36780

should be taught to deal with protected symbols.

llvm-svn: 36565

llvm-svn: 36495

llvm-svn: 36355

X86 32 bits.

llvm-svn: 36283

it is defined in.

llvm-svn: 36196

Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.

llvm-svn: 35320