llvm-svn: 104646

llvm-svn: 104645

as well.

llvm-svn: 104642

If you have a setjmp/longjmp situation, it's possible for stack slot coloring to
reuse a stack slot before it's really dead. For instance, if we have something
like this:

1:  y = g;
    x = sigsetjmp(env, 0);
    switch (x) {
    case 1:
      /* ... */
      goto run;  
    case 0:
  run:
      do_run(); /* marked as "no return" */
      break;
    case 3:
      if (...) {
        /* ... */
        goto run;
      }
      /* ... */
      break;
    }

2:  g = y;

"y" may be put onto the stack, so the expression "g = y" is relying upon the
fact that the stack slot containing "y" isn't modified between (1) and (2). But
it can be, because of the "no return" calls in there. A longjmp might come back
with 3, modify the stack slot, and then go to case 0. And it's perfectly
acceptable to reuse the stack slot there because there's no CFG flow from case 3
to (2).

The fix is to disable certain optimizations in these situations. Ideally, we'd
disable them for all "returns twice" functions. But we don't support that
attribute. Check for "setjmp" and "sigsetjmp" instead.

llvm-svn: 104640

and testcases accordingly.

llvm-svn: 104635

llvm-svn: 104628

Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite.  8023512.

llvm-svn: 104624

(oye, a word which should be better known to people writing tree
traversals, means grandchild.)

llvm-svn: 104619

llvm-svn: 104574

llvm-svn: 104572

llvm-svn: 104560

This fixes recent regression in store.exp from gdb testsuite.

llvm-svn: 104524

is first emitted, and StackOffsets are emitted in 16 bits.

llvm-svn: 104488

llvm-svn: 104463

llvm-svn: 104421

Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match
longjmp.

llvm-svn: 104419

llvm-svn: 104414

llvm-svn: 104412

llvm-svn: 104410

Evan please verify!

llvm-svn: 104408

Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs.

llvm-svn: 104385

so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.

llvm-svn: 104380

that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.

llvm-svn: 104377

reads or writes a register.

This takes partial redefines and undef uses into account.

Don't actually use it yet. That caused miscompiles.

llvm-svn: 104372

llvm-svn: 104338

llvm-svn: 104325

This reverts r104322. I think it was causing miscompilations.

llvm-svn: 104323

This correctly handles partial redefines and undef uses.

llvm-svn: 104322

definitions of the virtual register.

This happens when spilling the registers produced by REG_SEQUENCE:

%reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0

The rewriter would spill the register multiple times, dead store elimination
tried to keep up, but ended up cutting the branch it was sitting on.

llvm-svn: 104321

<imp-def> operand for the full register. This ensures that the full physical
register is marked live after register allocation.

llvm-svn: 104320

llvm-svn: 104306

llvm-svn: 104302

Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.

llvm-svn: 104293

llvm-svn: 104265

llvm-svn: 104254

Split DbgVariable. Eventually, variable info will be communicated through frame index, or DBG_VALUE instruction, or collection of DBG_VALUE instructions. Plus each DbgVariable may not need a label.

llvm-svn: 104233

pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot
of long latency instructions so a strict register pressure reduction
scheduler does not work well.
Early experiments show this speeds up some NEON loops by over 30%.

llvm-svn: 104216

llvm-svn: 104209

llvm-svn: 104197

test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up.  Radar 7998853.

llvm-svn: 104185