llvm-svn: 115928

initialization functions that initialize the set of passes implemented in
that library.  Add C bindings for these functions as well.

llvm-svn: 115927

llvm-svn: 115924

llvm-svn: 115923

llvm-svn: 115921

Before the implementation of isLegalAddressingMode, some rare cases 
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a 
bad TargetLowering, or if the bug is elsewhere and this patch just 
hides it.

llvm-svn: 115919

llvm-svn: 115910

llvm-svn: 115909

llvm-svn: 115908

compilation of MultiSource/Benchmarks/Bullet.

llvm-svn: 115907

llvm-svn: 115906

llvm-svn: 115905

llvm-svn: 115904

llvm-svn: 115901

a header declaring them all.  This is also where we will declare per-library pass-set
initializer functions down the road.

llvm-svn: 115900

llvm-svn: 115898

allowing us to convert ADD over.  deletes 160 lines of .td file.

llvm-svn: 115897

Start using ArithBinOpEFLAGS for OR, XOR, and SUB.

This removes 500 lines from the .td file.  Now AND/OR/XOR/SUB are all
defined exactly the same way instead of being close relatives.

llvm-svn: 115896

which instantiates the 34 versions of and all in one
swoop.  The BaseOpc/BaseOpc2/BaseOpc4 stuff should not
be required, but tblgen's feeble brain explodes when I
use Or4<BaseOpc>.V in the multipattern.

No change in the generated .inc files.

llvm-svn: 115893

llvm-svn: 115890

This does change the generated .inc files to include the implicit use/def of eax.
Since these instructions are only generated by the assembler and disassembler it
doesn't actually matter though.

llvm-svn: 115885

llvm-svn: 115884

As usual, no change in generated .inc files.

llvm-svn: 115882

Since the Hello pass is built as a loadable dynamic library, don't try to convert it to new-style registration yet.

llvm-svn: 115881

llvm-svn: 115880

instructions.

This unbreaks the machine code verifier and fixes PR8317.

llvm-svn: 115879

convert AND64ri32 to use BinOpRI.

llvm-svn: 115878

stuff that wants to take one or the other.  These can both be used
as the operation of a dag in a pattern match.

llvm-svn: 115877

This function looks like it is about ready to be generated by TebleGen.

llvm-svn: 115876

This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

llvm-svn: 115875

llvm-svn: 115874

llvm-svn: 115872

llvm-svn: 115860

Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored

llvm-svn: 115859

llvm-svn: 115858

llvm-svn: 115857

llvm-svn: 115853

llvm-svn: 115845

"lane" operand modifier.

llvm-svn: 115843

llvm-svn: 115841