llvm-svn: 74760

llvm-svn: 74733

llvm-svn: 74720

llvm-svn: 74718

llvm-svn: 74686

llvm-svn: 74677

llvm-svn: 74673

llvm-svn: 74659

llvm-svn: 74625

CommuteChangesDestination() should check if to-be-commuted instruction defines any register. Also teaches the default commuteInstruction() to commute instruction without definitions (e.g. X86::test / ARM::tsp).

llvm-svn: 74602

Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def.

Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.

llvm-svn: 74601

Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.

llvm-svn: 74580

 - This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.

llvm-svn: 74579

have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.

llvm-svn: 74564

Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.).

llvm-svn: 74519

Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.

The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.

llvm-svn: 74518

llvm-svn: 74477

llvm-svn: 74452

Update dwarf writer to only emit one DW_TAG_compile_unit per .o file. 

llvm-svn: 74449

llvm-svn: 74394

by Evan.

llvm-svn: 74370

llvm-svn: 74364

the SelectionDAG::getGlobalAddress function properly looks through
aliases to determine thread-localness, but then passes the GV* down
to GlobalAddressSDNode::GlobalAddressSDNode which does not.  Instead
of passing down isTarget, just pass down the predetermined node
opcode.  This fixes some assertions with out of tree changes I'm 
working on.

llvm-svn: 74325

we had multiple type planes and these lookups were expensive.

llvm-svn: 74319

SDNode::print_details to eliminate a ton of near-duplicate code.

llvm-svn: 74311

llvm-svn: 74285

but in the meantime lets print targetflags on node labels.

llvm-svn: 74274

llvm-svn: 74273

llvm-svn: 74270

Remove debug info anchors - llvm.dbg.compile_units, llvm.dbg.subprograms
and llvm.dbg.global_variables.

llvm-svn: 74251

llvm-svn: 74215

llvm-svn: 74204

llvm-svn: 74203

llvm-svn: 74199

to be shared, but how/where to privatize it is not immediately clear to me.

If any SelectionDAG experts see a better solution, please share!

llvm-svn: 74180

llvm-svn: 74179

Add section symbols to the symbol table

llvm-svn: 74170

null.

llvm-svn: 74147

llvm-svn: 74143

llvm-svn: 74140