use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346

colliding with llvm/ADT/ValueMap.h:ValueMap<>.

llvm-svn: 85344

llvm-svn: 85341

Fixed a bug in the coalescer where intervals were occasionally merged despite a real interference. This fixes rdar://problem/7157961.

llvm-svn: 85338

llvm-svn: 85335

llvm-svn: 85334

default behind a command line option. This will enable better performance for
vectors on NEON enabled processors.

llvm-svn: 85333

llvm-svn: 85332

llvm-svn: 85331

against both 2.6 and HEAD.  The default is still changed to eager jitting.

llvm-svn: 85330

llvm-svn: 85329

llvm-svn: 85327

llvm-svn: 85325

llvm-svn: 85323

llvm-svn: 85322

llvm-svn: 85321

llvm-svn: 85320

llvm-svn: 85319

llvm-svn: 85318

llvm-svn: 85316

llvm-svn: 85312

llvm-svn: 85311

llvm-svn: 85310

llvm-svn: 85306

llvm-svn: 85299

Do not held on to DenseMap slot accross map insertion. The insertion may cause the map to grow rending the slot invalid.
Use this opportunity to use ValueMap instead of DenseMap.

llvm-svn: 85298

BL_pred and BLr9_pred.

llvm-svn: 85297

llvm-svn: 85296

http://llvm.org/PR5184, and beef up the comments to describe what both options
do and the risks of lazy compilation in the presence of threads.

llvm-svn: 85295

llvm-svn: 85294

llvm-svn: 85290

llvm-svn: 85287

llvm-svn: 85286

llvm-svn: 85285

CMakeLists.txt, Makefiles, ... it's better to whitelist what we really
want to install.

Patch by Ingmar Vanhassel!

llvm-svn: 85282

Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.

llvm-svn: 85281

instruction format that already takes care of setting this.

llvm-svn: 85280

(assembler,asmprinter, bc reader+writer) and document it.  Codegen
currently aborts on it.

llvm-svn: 85274

for the r/rr fragment of the multiclass AI_unary_rrot/AI_bin_rrot.

llvm-svn: 85271

llvm-svn: 85266