llvm-svn: 142220

llvm-svn: 142217

llvm-svn: 142216

llvm-svn: 142214

obsolete. Check the attribute instead.
<rdar://problem/8031714>

llvm-svn: 142212

llvm-svn: 142211

source registers and redefine 32-bit and 64-bit instructions.

llvm-svn: 142210

llvm-svn: 142209

and have 32-bit and 64-bit instructions derive from it.

llvm-svn: 142207

Patch by Joe Abbey <jabbey@arxan.com>.

llvm-svn: 142206

llvm-svn: 142205

llvm-svn: 142204

Radar 10281206.

llvm-svn: 142202

There is no reason to have simple IR level pass in lib/Target.

llvm-svn: 142200

llvm-svn: 142194

Don't use inline assembly in 64-bit Visual Studio. Unfortunately, this means that cpuid leaf 7 can't be queried on versions of Visual Studio earlier than VS 2008 SP1. Fixes PR11147.

llvm-svn: 142177

llvm-svn: 142176

llvm-svn: 142171

llvm-svn: 142170

profile metadata at the same time. Use it to preserve metadata attached
to a branch when re-writing it in InstCombine.

Add metadata to the canonicalize_branch InstCombine test, and check that
it is tranformed correctly.

Reviewed by Nick Lewycky!

llvm-svn: 142168

directly manipulates the weights inside of the BranchProbabilityInfo
that is passed in.

llvm-svn: 142163

llvm-svn: 142162

Changed tests which assumed that vectors are legalized by widening them.

llvm-svn: 142152

on the memcpy call will pull up other unrelated stuff. Fixes PR11142.

llvm-svn: 142150

llvm-svn: 142141

While at it, merge some format strings.

llvm-svn: 142140

llvm-svn: 142139

<stdin>:1:12: error: register %rax is only available in 64-bit mode
   incl    %rax
           ^~~~

llvm-svn: 142137

X86AsmParser: Synthesize EndLoc for tokens out of StartLoc + Length and print ranges for invalid operands.

<stdin>:1:4: error: invalid instruction mnemonic 'abc'
   abc incl    %edi
   ^~~

llvm-svn: 142135

This reenables proper inline asm diagnostics in clang

llvm-svn: 142132

no pattern.

llvm-svn: 142130

llvm-svn: 142122

Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr.

llvm-svn: 142117

These missing flags show up as errors when running -verify-coalescing on
test-suite.

llvm-svn: 142111

llvm-svn: 142110

llvm-svn: 142108

string, pass it around as an enum.

llvm-svn: 142107

the X86 asmparser to produce ranges in the one case that was annoying me, for example:

test.s:10:15: error: invalid operand for instruction
movl 0(%rax), 0(%edx)
              ^~~~~~~

It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use 
ranges where appropriate if someone is interested.

llvm-svn: 142106

Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen

llvm-svn: 142105

Add X86 feature detection support for BMI instructions. Added new cpuid function for accessing leafs with sub leafs specified in ECX. Also added code to keep track of the max cpuid level supported in both basic and extended leaves and qualified the existing cpuid calls and the new call to leaf 7.

llvm-svn: 142089