Reapply r189013 (reverted in r189906) now that the underlying issue is fixed and tested (in r189996)

Debug info emission was tripping over an IRGen bug (fixed in r189996)
that was resulting in duplicate emission of static data members of class
templates in namespaces.

We could add more test coverage to debug info for this issue
specifically, but I think the underlying IRGen test is more targeted and
sufficient for the issue.

llvm-svn: 190001

Needs testcase updates.

llvm-svn: 190000

llvm-svn: 189999

llvm-svn: 189998

llvm-svn: 189997

A quirk of AST representation leads to class template static data member
definitions being visited twice during Clang IRGen resulting in
duplicate (benign) initializers.

Discovered while investigating a possibly-related debug info bug tickled
by the duplicate emission of these members & their associated debug
info.

With thanks to Richard Smith for help investigating, understanding, and
helping with the fix.

llvm-svn: 189996

llvm-svn: 189995

llvm-svn: 189994

llvm-svn: 189993

llvm-svn: 189992

If the instruction window is < NumRegs/2, pressure tracking is not
likely to be effective. The scheduler has to process a very large
number of tiny blocks. We want this to be fast.

llvm-svn: 189991

llvm-svn: 189990

llvm-svn: 189989

llvm-svn: 189988

Register pressure tracking is half the complexity of the
scheduler. It's useful to be able to turn it off for compile time and
performance comparisons.

llvm-svn: 189987

'Force' values in registers using the calling convention. Now, we only depend on
the calling convention and that the allocator performs copy coalescing.

llvm-svn: 189985

llvm-svn: 189984

llvm-svn: 189983

I am about to patch this code, and this makes the diff far more readable.

llvm-svn: 189982

llvm-svn: 189981

llvm-svn: 189980

llvm-svn: 189979

llvm-svn: 189978

llvm-svn: 189977

* It was redundant with -flto.
* It was confusing since -uAnythingElse is a different option.
* GCC uses -fuse-linker-plugin, so it was not even a compatibility option.

llvm-svn: 189976

llvm-svn: 189975

llvm-svn: 189974

llvm-svn: 189973

These instructions, such as vmul.f32, require the second source operand to
be in D0-D15 rather than the full D0-D31. When optimizing, make sure to
account for that by constraining the register class of a replacement virtual
register to be compatible with the virtual register(s) it's replacing.

I've been unsuccessful in creating a non-fragile regression test. This issue
was detected by the LLVM nightly test suite running on an A15 (Bullet).

PR17093: http://llvm.org/bugs/show_bug.cgi?id=17093
llvm-svn: 189972

llvm-svn: 189971

llvm-svn: 189970

No functionality change.

llvm-svn: 189969

llvm-svn: 189968

llvm-svn: 189967

build of the clang-modernize unittest which is for some reason not being
built by default on my system (sorry about that).

llvm-svn: 189966

page size can be null terminated correctly by MemoryBuffer.

llvm-svn: 189965

Thanks to Jared Grubb for writing it and sharing it!

llvm-svn: 189964

;] Update them. Sorry for the breakage.

llvm-svn: 189963

llvm-svn: 189962

Unaligned vldm/vstm need more uops and therefore are slower in general on swift.

radar://14522102

llvm-svn: 189961