of unallocatable registers, just because an alias is allocatable.  We were
picking registers like SIL just because ESI was being used.

llvm-svn: 30197

llvm-svn: 30162

llvm-svn: 30151

too many phi operands when lowering a switch to branches in some cases.

llvm-svn: 30142

llvm-svn: 30126

llvm-svn: 30122

llvm-svn: 30118

llvm-svn: 30117

llvm-svn: 30114

def operand or a use operand.

llvm-svn: 30109

actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.

llvm-svn: 30108

llvm-svn: 30099

llvm-svn: 30098

llvm-svn: 30097

Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example

llvm-svn: 30095

llvm-svn: 30082

llvm-svn: 30066

llvm-svn: 30065

Just because an alias of a register is available, it doesn't mean that we
can arbitrarily evict the register.

llvm-svn: 30064

livevariables information.  This fixes several regalloc=local failures on x86

llvm-svn: 30062

instruction includes physregs.

llvm-svn: 30061

llvm-svn: 30054

Restore it, which re-fixes X86/2006-08-21-ExtraMovInst.ll

llvm-svn: 30050

method for joining the live ranges instead of the fully-general one.

llvm-svn: 30049

possible and the target only supports MULHS.

llvm-svn: 30022

llvm-svn: 30021

need recursion.

llvm-svn: 30015

analysis 16% on crafty.

Wrap long lines.

llvm-svn: 30012

crafty with and without it).  Removing it speeds up live intervals 6%.

llvm-svn: 30010

for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.

llvm-svn: 29997

llvm-svn: 29996

llvm-svn: 29995

llvm-svn: 29994

llvm-svn: 29989

number of copies, potentially defining live ranges that appear to have
differing value numbers that become identical when coallsced.  Among other
things, this fixes CodeGen/X86/shift-coalesce.ll and PR687.

llvm-svn: 29968

handling.)

llvm-svn: 29954

Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG.

llvm-svn: 29951

llvm-svn: 29925

llvm-svn: 29921

llvm-svn: 29911