llvm-svn: 59344

llvm-svn: 59314

llvm-svn: 59311

registering XCoreTargetMachine.

llvm-svn: 59308

these operations if ladd/lsub are not available on the current
subtarget.

llvm-svn: 59305

bits in a word).

llvm-svn: 59296

llvm-svn: 59275

llvm-svn: 59274

(actually, code already all worked, only the comment
changed).  Use this to implement 'A' constraint on x86.
Fixes PR 1779.

llvm-svn: 59266

llvm-svn: 59258

llvm-svn: 59234

llvm-svn: 59231

llvm-svn: 59230

special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.

llvm-svn: 59190

llvm-svn: 59170

llvm-svn: 59117

llvm-svn: 59116

llvm-svn: 59109

llvm-svn: 59107

llvm-svn: 59104

llvm-svn: 59102

llvm-svn: 59100

llvm-svn: 59090

llvm-svn: 59088

llvm-svn: 59087

llvm-svn: 59084

llvm-svn: 59074

llvm-svn: 59052

llvm-svn: 59050

llvm-svn: 59047

llvm-svn: 59046

to be sign-extended when it is promoted to 64 bits for intermediate
offset calculations. The offset calculations are done as uint64_t so that
overflow conditions are well defined.

This fixes a problem which is currently hidden by the x86 AsmPrinter but
which was exposed by r58917 (which is temporarily reverted).  See PR3027
for details.

llvm-svn: 59044

llvm-svn: 59026

backend.

llvm-svn: 59018

llvm-svn: 59016

llvm-svn: 59009

llvm-svn: 59006

llvm-svn: 59004

support targets that support these conversions. Users should avoid using
this node as the current targets don't generating code for it.

llvm-svn: 59001

llvm-svn: 58949