Move test/CodeGen/Generic/2012-02-01-CoalescerBug.ll to CodeGen/ARM, for now. It requires TARGETS=arm.

I cannot reproduce a fixed issue with other targets.

llvm-svn: 149604

llvm-svn: 149602

llvm-svn: 149601

Special handling was added for v4i32 -> v4i64 and v8i16 -> v8i32
extensions.

llvm-svn: 149600

llvm-svn: 149599

Re-apply the coalescer fix from r149147. Commit r149597 should have fixed the llvm-gcc and clang self-host issues.

llvm-svn: 149598

llvm-svn: 149597

llvm-svn: 149596

Long basic blocks with many candidate pairs (such as in the SHA implementation in Perl 5.14; thanks to Roman Divacky for the example) used to take an unacceptably-long time to compile. Instead, break long blocks into groups so that no group has too many candidate pairs.

llvm-svn: 149595

llvm-svn: 149594

a type when we have a forward declaration. We always have found a 
type by basename, but now we also compare the decl context of the 
die we are trying to complete with the matches we find from the accelerator
tables to ensure we get the right one.

llvm-svn: 149593

more than two adjacent ranges needed to be merged. The new version should be
able to handle an arbitrary sequence of adjancent ranges.

llvm-svn: 149588

extern inline case considered

llvm-svn: 149587

Split Sema::MarkDeclarationReferenced into multiple functions; the additional entry points are needed to implement C++11 odr-use marking correctly.  No functional change in this patch; I'll actually make the change which fixes the odr-use marking in a followup patch.

llvm-svn: 149586

 

llvm-svn: 149585

selector registers.
 

llvm-svn: 149584

 

llvm-svn: 149583

the the code like this (due to x and &x being the same value but
different size):

void* x[] = { ptr1, ptr2, ptr3 };
CFArrayCreate(NULL, (const void **) &x, count, NULL);

llvm-svn: 149579

  * support the gcc __builtin_constant_p() ? ... : ... folding hack in C++11
  * check for unspecified values in pointer comparisons and pointer subtractions

llvm-svn: 149578

llvm-svn: 149576

dependencies and outputs them in GraphViz format.

llvm-svn: 149575

This was the cause of the silent failure to generate
clang's config.h. My bad.

Fix on r149563 / r149568.

llvm-svn: 149574

is declaring ivars. // rdar://10752081

llvm-svn: 149573

Change the check for constant-conversion with width-1 bitfields so it doesn't suppress quite as many cases.  Based off a testcase in the gcc testsuite.

llvm-svn: 149572

Too many weird build failures.

llvm-svn: 149571

llvm-svn: 149569

Keep the string empty when unspecified. Undoes
part of r149563.

llvm-svn: 149568

llvm-svn: 149567

llvm-svn: 149566

// rdar://10770497

llvm-svn: 149565

negative hex values. Also added a very rudimentary version of the == and !=
operators to the lldb.value helper class.

llvm-svn: 149564

configure was silently failing to produce anything in the case
where clang wasn't at tools/clang/, resulting in compilation
errors much later in the build when config.h didn't exist.

llvm-svn: 149563

llvm-svn: 149562

llvm-svn: 149561

a full type go ahead and emit it if we currently only have a forward
declaration.

Fixes gdb bots for gdb1090.exp and call-ar-st.exp.

llvm-svn: 149560

llvm-svn: 149559

Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.

Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.

Adds a test to verify that the scheduler is working.

Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.

Patch by Preston Gurd!

llvm-svn: 149558

llvm-svn: 149557

It is simpler to define a composite index directly:

  def ssub_2 : SubRegIndex<[dsub_1, ssub_0]>;
  def ssub_3 : SubRegIndex<[dsub_1, ssub_1]>;

Than specifying the composite indices on each register:

  CompositeIndices = [(ssub_2 dsub_1, ssub_0),
                      (ssub_3 dsub_1, ssub_1)] in ...

This also makes it clear that SubRegIndex composition is supposed to be
unique.

llvm-svn: 149556

changing the diagnostic. Also use correct spelling for both.

llvm-svn: 149554