split the FSEL family into 4 things instead of just two.

llvm-svn: 23588

llvm-svn: 23587

destination vreg.

llvm-svn: 23586

llvm-svn: 23585

llvm-svn: 23584

llvm-svn: 23583

we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.

llvm-svn: 23582

llvm-svn: 23581

For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0

llvm-svn: 23580

llvm-svn: 23579

llvm-svn: 23578

These are used to represent float and double values, and the two regclasses
contain the same physical registers.

llvm-svn: 23577

This is Jim's feature implemented so that graphs could 'opt-in' and get
this behavior.  This is currently used by selection dags.

llvm-svn: 23576

llvm-svn: 23575

llvm-svn: 23574

2. Printing node groups when displaying nodes.

llvm-svn: 23573

llvm-svn: 23572

llvm-svn: 23571

llvm-svn: 23570

llvm-svn: 23569

llvm-svn: 23568

llvm-svn: 23567

2. Added node groups to handle flagged nodes.

3. Started weaning simple scheduling off existing emitter.

llvm-svn: 23566

llvm-svn: 23565

llvm-svn: 23564

llvm-svn: 23563

llvm-svn: 23562

trim down the target info structs now that we have a preferred spill register class for each callee save register

Why is V9 maintaining these tables manually? ugh!

llvm-svn: 23561

trim down the target info structs now that we have a preferred spill register class for each callee save register

llvm-svn: 23560

llvm-svn: 23559

llvm-svn: 23558

llvm-svn: 23557

class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556

llvm-svn: 23555

llvm-svn: 23554

llvm-svn: 23553

llvm-svn: 23552

as callee save.  They can never be generated by the compiler.

llvm-svn: 23551

llvm-svn: 23550

llvm-svn: 23549