An aligned constant pool entry may require extra alignment padding where
the new water is created.  Take that into account when computing offset.

Also consider the alignment of other constant pool entries when
splitting a basic block.  Alignment padding may make it necessary to
move the split point higher.

llvm-svn: 146609

llvm-svn: 146608

llvm-svn: 146605

On ARM, peephole optimization for ABS creates a trivial cfg triangle which tempts machine sink to sink instructions in code which is really straight line code. Sometimes this sinking may alter register allocator input such that use and def of a reg is divided by a branch in between, which may result in extra spills. Now mahine sink avoids sinking if final sink destination is post dominator.

Radar 10266272.

llvm-svn: 146604

with the correct iterator.
<rdar://problem/10530851>

llvm-svn: 146600

getStreamer().EmitBytes.  Suggestion by Benjamin Kramer!

llvm-svn: 146599

llvm-svn: 146597

Add tests for w/ writeback instruction parsing and encoding.

llvm-svn: 146594

it to the streamer.  rdar://10383898

llvm-svn: 146592

llvm-svn: 146590

In addition to improving the representation, this adds support for assembly
parsing of these instructions.

llvm-svn: 146588

llvm-svn: 146585

r0 = mov #0
r0 = moveq #1

Then the second instruction has an implicit data dependency on the first
instruction. Sadly I have yet to come up with a small test case that
demonstrate the post-ra scheduler taking advantage of this.

llvm-svn: 146583

Work in progress. Parsing for non-writeback, single spaced register lists
works now. The rest have the representations better factored, but still
need more to be able to parse properly.

llvm-svn: 146579

llvm-svn: 146578

point to ARC-managed pointers sometimes. This fixes rdar://10551239.

llvm-svn: 146577

llvm-svn: 146575

emission is not supported yet, but a patch that adds the support should follow
soon.

llvm-svn: 146572

llvm-svn: 146571

llvm-svn: 146570

llvm-svn: 146569

llvm-svn: 146568

When 'cmp rn #imm' doesn't match due to the immediate not being representable,
but 'cmn rn, #-imm' does match, use the latter in place of the former, as
it's equivalent.

rdar://10552389

llvm-svn: 146567

llvm-svn: 146566

llvm-svn: 146550

llvm-svn: 146549

llvm-svn: 146548

llvm-svn: 146547

llvm-svn: 146546

llvm-svn: 146545

rdar://10549683

llvm-svn: 146543

  to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.

llvm-svn: 146542

llvm-svn: 146534

llvm-svn: 146531

[asan] remove .preinit_array from the compiler module (it breaks .so builds). This should be done in the run-time. 

llvm-svn: 146527

llvm-svn: 146523

llvm-svn: 146522

llvm-svn: 146521

rdar://10549767

llvm-svn: 146520

rdar://10550269

llvm-svn: 146519