Implement PR3495: local spiller optimization. The local spiller can now keep availability information over BB boundaries. It visits BB's in depth first order. After visiting a BB if it find a successor which has a single predecessor it visits the successor next without clearing the availability information. This allows the successor to omit reloads or change them into copies.

llvm-svn: 64298

instruction index across each part. Instruction indices are used
to make live range queries, and live ranges can extend beyond
scheduling region boundaries.

Refactor the ScheduleDAGSDNodes class some more so that it
doesn't have to worry about this additional information.

llvm-svn: 64288

an index. This code is on the hot-path because the current
way SDep edges are uniqued has quadratic complexity.

llvm-svn: 64262

a scheduling region boundary.  This isn't necessary for
correctness; it helps with compile time, as it avoids the need
for data- and anti-dependencies from all spills and reloads on
the stack-pointer modification.

llvm-svn: 64255

scheduling, and generalize is so that preserves state across
scheduling regions. This fixes incorrect live-range information around
terminators and labels, which are effective region boundaries.

In place of looking for terminators to anchor inter-block dependencies,
introduce special entry and exit scheduling units for this purpose.

llvm-svn: 64254

Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.

llvm-svn: 64210

llvm-svn: 64204

If the target cannot issue a copy for the given source and dest registers, abort instead of silently continue.

llvm-svn: 64184

llvm-svn: 64164

llvm-svn: 64163

llvm-svn: 64126

Fix another case ShortenDeadCopySrcLiveRange is shortening too much. No test case possible since I don't know what to grep for. :-(

llvm-svn: 64125

suprise to some callers, e.g. register coalescer. For now, add an parameter
that tells AnalyzeBranch whether it's safe to modify the mbb. A better
solution is out there, but I don't have time to deal with it right now.

llvm-svn: 64124

Fix PR3486. Fix a bug in code that manually patch physical register live interval after its sub-register is coalesced with a virtual register.

llvm-svn: 64082

llvm-svn: 64076

Right now if the coalesced copy def is dead and its src is a kill, and that
there are now other uses within the live range, the coalescer would mark the
def of the source register as dead. But it should also check if there are
other kills which means the value has other uses not in the live range.

llvm-svn: 64075

llvm-svn: 64073

llvm-svn: 64062

llvm-svn: 64040

No functional change.

llvm-svn: 64026

ScheduleDAG's TLI member to use const.

llvm-svn: 64018

Adjust derived classes to pass UnknownLoc where
a DebugLoc does not make sense.  Pick one of
DebugLoc and non-DebugLoc variants to survive
for all such classes.

llvm-svn: 64000

llvm-svn: 63999

llvm-svn: 63995

Don't sink the instruction if TargetRegisterInfo::isSafeToMoveRegClassDefs doesn't think it's safe. This works around PR1911.

llvm-svn: 63994

Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.

llvm-svn: 63992

getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.

llvm-svn: 63978

llvm-svn: 63971

llvm-svn: 63969

llvm-svn: 63967

llvm-svn: 63951

SelectionDAGISel::CreateScheduler, and make it just create the
scheduler. Leave running the scheduler to the higher-level code.
This makes the higher-level code a little more explicit and
easier to follow, and will help enable some future refactoring.

llvm-svn: 63944

llvm-svn: 63941

llvm-svn: 63938

that previously included this header should include
SchedulerRegistry.h instead.

llvm-svn: 63937

Add TargetInstrInfo::isSafeToMoveRegisterClassDefs. It returns true if it's safe to move an instruction which defines a value in the register class. Replace pre-splitting specific IgnoreRegisterClassBarriers with this new hook.

llvm-svn: 63936

that used this header to select a scheduling policy should
use SchedulerRegistry.h instead (llvm-gcc and clang were
updated a while ago).

llvm-svn: 63934

llvm-svn: 63909

its corresponding getTargetNode.  Lots of
caller changes.

llvm-svn: 63904

isAsCheapAsMove instructions can have register src operands. Check if they are really re-materializable.
This fixes sse.expandfft and sse.stepfft.

llvm-svn: 63890