- Aug 10, 2011
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Jim Grosbach authored
Assigned symbol addresses get truncated to 32-bits, even on 64-bit platforms. That's obviously bogus. For example, .globl _foo .equ _foo, 0x987654321ULL rdar://9922863 llvm-svn: 137158
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Benjamin Kramer authored
Not sure about BLXi, but this is what the old disassembler did. llvm-svn: 137156
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- Aug 09, 2011
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Owen Anderson authored
llvm-svn: 137154
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Owen Anderson authored
llvm-svn: 137153
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Benjamin Kramer authored
The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore. llvm-svn: 137151
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Owen Anderson authored
llvm-svn: 137150
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Jim Grosbach authored
rdar://9915869 llvm-svn: 137148
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Owen Anderson authored
llvm-svn: 137147
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Owen Anderson authored
llvm-svn: 137146
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Eli Friedman authored
This is mostly descriptive of the intended state once atomic load and store have landed. llvm-svn: 137145
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Owen Anderson authored
This new disassembler can correctly decode all the testcases that the old one did, though some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in operand checking as the old one was. llvm-svn: 137144
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Bob Wilson authored
llvm-svn: 137137
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Bill Wendling authored
llvm-svn: 137135
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Bill Wendling authored
'static' variable will be emitted twice. PR10081 llvm-svn: 137134
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Jakob Stoklund Olesen authored
Coalescing can remove copy-like instructions with sub-register operands that constrained the register class. Examples are: x86: GR32_ABCD:sub_8bit_hi -> GR32 arm: DPR_VFP2:ssub0 -> DPR Recompute the register class of any virtual registers that are used by less instructions after coalescing. This affects code generation for the Cortex-A8 where we use NEON instructions for f32 operations, c.f. fp_convert.ll: vadd.f32 d16, d1, d0 vcvt.s32.f32 d0, d16 The register allocator is now free to use d16 for the temporary, and that comes first in the allocation order because it doesn't interfere with any s-registers. llvm-svn: 137133
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Bruno Cardoso Lopes authored
v4f64 = sitofp v4i32. This fix PR10559. Also add support for v4i32 = fptosi v4f64. llvm-svn: 137128
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Bruno Cardoso Lopes authored
llvm-svn: 137127
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Justin Holewinski authored
- Calls are supported on SM 2.0+ for function with no return values llvm-svn: 137125
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Jakob Stoklund Olesen authored
This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. llvm-svn: 137123
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Renato Golin authored
llvm-svn: 137115
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Bruno Cardoso Lopes authored
llvm-svn: 137114
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Bob Wilson authored
When this variable is set, "uname -r" will return its value instead of the real OS version. Make this affect LLVM's triple for consistency. <rdar://problem/9919167> llvm-svn: 137111
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Andrew Trick authored
LoopUnroll looks like it has some stale code. Remove it to prove my sanity and avoid further confusion. llvm-svn: 137106
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Bruno Cardoso Lopes authored
llvm-svn: 137105
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Bruno Cardoso Lopes authored
llvm-svn: 137104
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Bruno Cardoso Lopes authored
llvm-svn: 137103
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Bruno Cardoso Lopes authored
the patterns already there to be more strict regarding the predicate. This fixes PR10558 llvm-svn: 137100
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Bill Wendling authored
instead of a vector. llvm-svn: 137099
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Bill Wendling authored
The 'unwind' instruction was acting essentially as a placeholder, because it would be replaced at the end of this function by a branch to the "unwind handler". The 'unwind' instruction is going away, so use 'unreachable' instead, which serves the same purpose as a placeholder. llvm-svn: 137098
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Devang Patel authored
llvm-svn: 137096
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Devang Patel authored
llvm-svn: 137095
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Jakob Stoklund Olesen authored
No functional change. llvm-svn: 137094
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Bill Wendling authored
llvm-svn: 137091
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Bruno Cardoso Lopes authored
llvm-svn: 137090
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Jakob Stoklund Olesen authored
RegisterCoalescer.h still has the CoalescerPair class interface. llvm-svn: 137088
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Dan Gohman authored
llvm-svn: 137085
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Jakob Stoklund Olesen authored
A public interface is no longer needed since RegisterCoalescer is not an analysis any more. llvm-svn: 137082
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Jim Grosbach authored
Fix the instruction representation to correctly only allow post-indexed form. Add tests. llvm-svn: 137074
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Owen Anderson authored
llvm-svn: 137073
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Bill Wendling authored
Patch by Jingyue! llvm-svn: 137072
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