which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64, which is currently being modeled
as a register.

llvm-svn: 82815

llvm-svn: 82812

and skipping the defs.

llvm-svn: 82811

llvm-svn: 82803

 - Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

llvm-svn: 82794

naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.

llvm-svn: 82790

before producing FSIN, FCOS, FSQRT.  If they aren't
so marked we have to assume they might set errno.

llvm-svn: 82781

allows appropriate backends to generate a sqrt instruction.

On x86, this isn't done at -O0 because we go through
FastISel instead.  This is a behavior change from before
this series of sqrt patches started.  I think this is OK
considering that compile speed is most important at -O0, but
could be convinced otherwise.

llvm-svn: 82778

For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned.  For the older ARM APCS ABI, the stack
alignment is just always 4 bytes.  For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo.  This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4.  (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.

llvm-svn: 82767

Previously, it treated GV+28 GV+0 as different bases, and assumed they could
not alias.

llvm-svn: 82753

llvm-svn: 82742

interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as needed.

Instead of scavenging registers on the fly while eliminating frame indices,
new virtual registers are created, and then a scavenged collectively in a
post-pass over the function. This isolates the bits that need to interact
with the scavenger, and sets the stage for more intelligent use, and reuse,
of scavenged registers.

For the time being, this is disabled by default. Once the bugs are worked out,
the current scavenging calls in replaceFrameIndices() will be removed and
the post-pass scavenging will be the default. Until then,
-enable-frame-index-scavenging enables the new code. Currently, only the
Thumb1 back end is set up to use it.

llvm-svn: 82734

delete a few blank lines.

llvm-svn: 82729

llvm-svn: 82727

llvm-svn: 82709

LocalAreaOffset.  (We don't have any of those right now.)
PEI::calculateFrameObjectOffsets includes the absolute value of the
LocalAreaOffset in the cumulative offset value used to calculate the
stack frame size.  It then adds the raw value of the LocalAreaOffset
to the stack size.  For a StackGrowsDown target, that raw value is negative
and has the effect of cancelling out the absolute value that was added
earlier, but that obviously won't work for a StackGrowsUp target.  Change
to subtract the absolute value of the LocalAreaOffset.

llvm-svn: 82693

unconditionally compute MMI even if the target doesn't support EH or Debug info, because the target may use it for other things, this fixes PR5036

llvm-svn: 82684

LiveVariables add implicit kills to correctly track partial register kills. This works well enough and is fairly accurate. But coalescer can make it impossible to maintain these markers. e.g.

        BL <ga:sss1>, %R0<kill,undef>, %S0<kill>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def>, ...
...
	%reg1031<def> = FLDS <cp#1>, 0, 14, %reg0, Mem:LD4[ConstantPool]
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When reg1031 and S0 are coalesced, the copy (FCPYS) will be eliminated the the implicit-kill of D0 is lost. In this case it's possible to move the marker to the FLDS. But in many cases, this is not possible. Suppose

	%reg1031<def> = FOO <cp#1>, %D0<imp-def>
...
   	%S0<def> = FCPYS %reg1031<kill>, 14, %reg0, %D0<imp-use,kill>

When FCPYS goes away, the definition of S0 is the "FOO" instruction. However, transferring the D0 implicit-kill to FOO doesn't work since it is the def of D0 itself. We need to fix this in another time by introducing a "kill" pseudo instruction to track liveness.

Disabling the assertion is not ideal, but machine verifier is doing that job now. It's important to know double-def is not a miscomputation since it means a register should be free but it's not tracked as free. It's a performance issue instead.

llvm-svn: 82677

Clean up LiveVariables and change how it deals with partial updates and kills. This also eliminate the horrible check which scan forward to the end of the basic block. It should be faster and more accurate.

llvm-svn: 82676

llvm-svn: 82656

is also the name of their type, as declarations like "EVT EVT" look
really odd.

llvm-svn: 82654

The machine code verifier did not check for explicit operands correctly. It
used MachineInstr::getNumExplicitOperands, but that method may cheat and use
the declared count in the TargetInstrDesc.

Now we check the explicit operands one at a time in visitMachineOperand.

llvm-svn: 82652

llvm-svn: 82641

Fix bug in kill flag updating for post-register-allocation scheduling. When the kill flag of a superreg needs to be cleared because there are one or more subregs live, we instead add implicit-defs of those subregs and leave the kill flag on the superreg. This allows us to end the live-range of the superreg without ending the live-ranges of the subregs.

llvm-svn: 82629

of the defs are processed.
Also fix a implicit_def propagation bug: a implicit_def of a physical register
should be applied to uses of the sub-registers.

llvm-svn: 82616

llvm-svn: 82610

two different places for printing MachineMemOperands.

Drop the virtual from Value::dump and instead give Value a
protected virtual hook that can be overridden by subclasses
to implement custom printing. This lets printing be more
consistent, and simplifies printing of PseudoSourceValue
values.

llvm-svn: 82599

llvm-svn: 82591

llvm-svn: 82554

Fix PR5024. LiveVariables::FindLastPartialDef should return a set of sub-registers that were defined by the last partial def, not just a single sub-register.

llvm-svn: 82535

llvm-svn: 82505

%S0<def> = EXTRACT_SUBREG %Q0<kill>, 1
to
%S0<def> = IMPLICIT_DEF %Q0<imp-use,kill>

Implicit_def does not *read* any register so the operand should be marked "implicit". The missing "implicit" marker on the operand is wrong, but it doesn't actually break anything.

llvm-svn: 82503

variable increment / decrement slighter high priority. 

This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.

llvm-svn: 82485

the base pointer, without the offset. This matches MemSDNode's
new alignment behavior, and holds more interesting information.

llvm-svn: 82473

llvm-svn: 82455

The machine code verifier no longer tolerates phi instructions with noop
operands. All MBBs on a phi instruction must be in the CFG.

llvm-svn: 82448

Fix PR4986. "r1024 = insert_subreg r1024, undef, 2" cannot be turned in an implicit_def. Instead, it's an identity copy so it should be eliminated. Also make sure to update livevariable kill information.

llvm-svn: 82436

feature, either build the JIT in debug mode to enable it by default or pass
-jit-emit-debug to lli.

Right now, the only debug information that this communicates to GDB is call
frame information, since it's already being generated to support exceptions in
the JIT.  Eventually, when DWARF generation isn't tied so tightly to AsmPrinter,
it will be easy to push that information to GDB through this interface.

Here's a step-by-step breakdown of how the feature works:

- The JIT generates the machine code and DWARF call frame info
  (.eh_frame/.debug_frame) for a function into memory.
- The JIT copies that info into an in-memory ELF file with a symbol for the
  function.
- The JIT creates a code entry pointing to the ELF buffer and adds it to a
  linked list hanging off of a global descriptor at a special symbol that GDB
  knows about.
- The JIT calls a function marked noinline that GDB knows about and has put an
  internal breakpoint in.
- GDB catches the breakpoint and reads the global descriptor to look for new
  code.
- When sees there is new code, it reads the ELF from the inferior's memory and
  adds it to itself as an object file.
- The JIT continues, and the next time we stop the program, we are able to
  produce a proper backtrace.

Consider running the following program through the JIT:

#include <stdio.h>
void baz(short z) {
  long w = z + 1;
  printf("%d, %x\n", w, *((int*)NULL));  // SEGFAULT here
}
void bar(short y) {
  int z = y + 1;
  baz(z);
}
void foo(char x) {
  short y = x + 1;
  bar(y);
}
int main(int argc, char** argv) {
  char x = 1;
  foo(x);
}

Here is a backtrace before this patch:
Program received signal SIGSEGV, Segmentation fault.
[Switching to Thread 0x2aaaabdfbd10 (LWP 25476)]
0x00002aaaabe7d1a8 in ?? ()
(gdb) bt
#0  0x00002aaaabe7d1a8 in ?? ()
#1  0x0000000000000003 in ?? ()
#2  0x0000000000000004 in ?? ()
#3  0x00032aaaabe7cfd0 in ?? ()
#4  0x00002aaaabe7d12c in ?? ()
#5  0x00022aaa00000003 in ?? ()
#6  0x00002aaaabe7d0aa in ?? ()
#7  0x01000002abe7cff0 in ?? ()
#8  0x00002aaaabe7d02c in ?? ()
#9  0x0100000000000001 in ?? ()
#10 0x00000000014388e0 in ?? ()
#11 0x00007fff00000001 in ?? ()
#12 0x0000000000b870a2 in llvm::JIT::runFunction (this=0x1405b70,
F=0x14024e0, ArgValues=@0x7fffffffe050)
   at /home/rnk/llvm-gdb/lib/ExecutionEngine/JIT/JIT.cpp:395
#13 0x0000000000baa4c5 in llvm::ExecutionEngine::runFunctionAsMain
(this=0x1405b70, Fn=0x14024e0, argv=@0x13f06f8, envp=0x7fffffffe3b0)
   at /home/rnk/llvm-gdb/lib/ExecutionEngine/ExecutionEngine.cpp:377
#14 0x00000000007ebd52 in main (argc=2, argv=0x7fffffffe398,
envp=0x7fffffffe3b0) at /home/rnk/llvm-gdb/tools/lli/lli.cpp:208

And a backtrace after this patch:
Program received signal SIGSEGV, Segmentation fault.
0x00002aaaabe7d1a8 in baz ()
(gdb) bt
#0  0x00002aaaabe7d1a8 in baz ()
#1  0x00002aaaabe7d12c in bar ()
#2  0x00002aaaabe7d0aa in foo ()
#3  0x00002aaaabe7d02c in main ()
#4  0x0000000000b870a2 in llvm::JIT::runFunction (this=0x1405b70,
F=0x14024e0, ArgValues=...)
   at /home/rnk/llvm-gdb/lib/ExecutionEngine/JIT/JIT.cpp:395
#5  0x0000000000baa4c5 in llvm::ExecutionEngine::runFunctionAsMain
(this=0x1405b70, Fn=0x14024e0, argv=..., envp=0x7fffffffe3c0)
   at /home/rnk/llvm-gdb/lib/ExecutionEngine/ExecutionEngine.cpp:377
#6  0x00000000007ebd52 in main (argc=2, argv=0x7fffffffe3a8,
envp=0x7fffffffe3c0) at /home/rnk/llvm-gdb/tools/lli/lli.cpp:208

llvm-svn: 82418

llvm-svn: 82397

U    lib/CodeGen/AsmPrinter/DwarfException.cpp
U    lib/CodeGen/AsmPrinter/DwarfException.h

--- Reverse-merging r82274 into '.':
U    lib/Target/TargetLoweringObjectFile.cpp
G    lib/CodeGen/AsmPrinter/DwarfException.cpp

These revisions were breaking everything.

llvm-svn: 82396