- Add support for seto, setno, setc, and setnc instructions.

llvm-svn: 60382

MERGE_VALUES node with only one operand, so get
rid of special code that only existed to handle
that possibility.

llvm-svn: 60349

ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.

llvm-svn: 60348

llvm-svn: 60286

being both a namespace and a variable name.

llvm-svn: 60208

llvm-svn: 60156

On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size.
e.g.
movl 4(%esp), %eax
addl $4, %eax

is 2 bytes shorter than

movl $4, %eax
addl 4(%esp), %eax

llvm-svn: 60139

the conditional for the BRCOND statement. For instance, it will generate:

    addl %eax, %ecx
    jo LOF

instead of

    addl %eax, %ecx
    ; About 10 instructions to compare the signs of LHS, RHS, and sum.
    jl LOF

llvm-svn: 60123

llvm-svn: 60095

- Mark "add with overflow" as having a custom lowering for X86. Give it a null
  lowering representation for now.

llvm-svn: 59971

Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files.

llvm-svn: 59953

llvm-svn: 59929

practice these booleans are mostly produced by SetCC,
however the concept is more general.

llvm-svn: 59911

llvm-svn: 59901

llvm-svn: 59872

llvm-svn: 59720

llvm-svn: 59677

Discourage (allocate last) use of x86_64 R12 and R13 due to their
longer instruction encodings.

llvm-svn: 59644

they trap on divide-by-zero, and this side effect is otherwise
unmodeled.

llvm-svn: 59551

llvm-svn: 59542

well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.

Patch by Scott Graham!

llvm-svn: 59378

llvm-svn: 59311

(actually, code already all worked, only the comment
changed).  Use this to implement 'A' constraint on x86.
Fixes PR 1779.

llvm-svn: 59266

special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.

llvm-svn: 59190

llvm-svn: 59052

to be sign-extended when it is promoted to 64 bits for intermediate
offset calculations. The offset calculations are done as uint64_t so that
overflow conditions are well defined.

This fixes a problem which is currently hidden by the x86 AsmPrinter but
which was exposed by r58917 (which is temporarily reverted).  See PR3027
for details.

llvm-svn: 59044

llvm-svn: 59004

llvm-svn: 58949

and breaks llvm-gcc

llvm-svn: 58926

FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?

llvm-svn: 58917

llvm-svn: 58897

This is a temporary fix for the -print-emitted-asm option, where
errs() is used as the stream, in the case where other code is
using stderr without using errs()' buffer. Hopefully soon we'll
fix errs() to be non-buffered instead. Patch by Preston Gurd.

llvm-svn: 58859

llvm-svn: 58796

llvm-svn: 58752

llvm-svn: 58750

priority function. Instead, just iterate over the AllNodes list, which is
already in topological order. This eliminates a fair amount of bookkeeping,
and speeds up the isel phase by about 15% on many testcases.

The impact on most targets is that AddToISelQueue calls can be simply removed.

In the x86 target, there are two additional notable changes.

The rule-bending AND+SHIFT optimization in MatchAddress that creates new
pre-isel nodes during isel is now a little more verbose, but more robust.
Instead of either creating an invalid DAG or creating an invalid topological
sort, as it has historically done, it can now just insert the new nodes into
the node list at a position where they will be consistent with the topological
ordering.

Also, the address-matching code has logic that checked to see if a node was
"already selected". However, when a node is selected, it has all its uses
taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any
further visits from MatchAddress. This code is now removed.

llvm-svn: 58748

indirect gv reference. Please don't call it lazy.

llvm-svn: 58746

have its node id set. The new and and shift nodes are the nodes that need
the IDs. This fixes PR2982.

llvm-svn: 58655

adding a TargetMachine member to the base TargetAsmInfo class instead.

llvm-svn: 58624

llvm-svn: 58528