- Jun 02, 2010
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Dan Gohman authored
mailing list archives. llvm-svn: 105341
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Eli Friedman authored
x86 backend currently doesn't know how to handle them. This doesn't really fix anything because LegalizeTypes doesn't know how to handle them either. We do get a better error message, though. llvm-svn: 105305
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- May 29, 2010
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Evan Cheng authored
Fix PR7193: if sibling call address can take a register, make sure there are enough registers available by counting inreg arguments. llvm-svn: 105092
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Dale Johannesen authored
llvm-svn: 105059
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- May 27, 2010
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Dale Johannesen authored
No functional effect as these nodes are not generated yet. llvm-svn: 104879
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Dan Gohman authored
To support this, move IsCalleePop from X86ISelLowering to X86Subtarget. llvm-svn: 104866
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- May 26, 2010
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Zhongxing Xu authored
llvm-svn: 104691
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- May 22, 2010
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- May 21, 2010
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Dale Johannesen authored
llvm-svn: 104337
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Dale Johannesen authored
Case where MMX is disabled wasn't handled right. MMX->MMX bitconverts are Legal. llvm-svn: 104336
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Dale Johannesen authored
tricky since there's a 3rd 64-bit type, MMX vectors. PR 7135. llvm-svn: 104308
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- May 19, 2010
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Evan Cheng authored
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace. llvm-svn: 104147
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- May 16, 2010
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Dale Johannesen authored
<1xi64> -> i64 to work in MMX registers on hosts where -no-sse is the default (not mine). The right thing is to accept this and make i64->f64 conversions go through memory, but I don't have time right now. llvm-svn: 103914
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Dale Johannesen authored
(This worked as of about 6 months ago and I didn't track down exactly what broke it; I think this fix is appropriate.) llvm-svn: 103911
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Anton Korobeynikov authored
Patch by Charles Davis and Steven Watanabe! llvm-svn: 103902
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- May 15, 2010
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Dale Johannesen authored
The implementation in LegalizeIntegerTypes to handle this as sint64->float + appropriate power of 2 is subject to double rounding, considered incorrect by numerics people. Use this implementation only when it is safe. This leads to using library calls in some cases that produced inline code before, but it's correct now. (EVTToAPFloatSemantics belongs somewhere else, any suggestions?) Add a correctly rounding (though not particularly fast) conversion that uses X87 80-bit computations for x86-32. 7885399, 5901940. This shows up in gcc.c-torture/execute/ieee/rbug.c in the gcc testsuite on some platforms. llvm-svn: 103883
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- May 14, 2010
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Bill Wendling authored
the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
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Dan Gohman authored
used more than once. If ISel had put a kill flag on one of them, it's not valid to transfer the kill flag to each new instance. llvm-svn: 103799
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- May 11, 2010
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Dan Gohman authored
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
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- May 01, 2010
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Dan Gohman authored
changes before doing phi lowering for switches. llvm-svn: 102809
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- Apr 30, 2010
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Dan Gohman authored
on the original variables, so it's easier to see what is being done to which blocks. llvm-svn: 102759
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Dan Gohman authored
llvm-svn: 102730
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Evan Cheng authored
Another sibcall bug. If caller and callee calling conventions differ, then it's only safe to do a tail call if the results are returned in the same way. llvm-svn: 102683
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- Apr 28, 2010
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Evan Cheng authored
llvm-svn: 102493
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Evan Cheng authored
llvm-svn: 102488
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Evan Cheng authored
Rather than having a ton of patterns for double shift instructions, e.g. SHLD16rrCL, just perform custom dag combine to form x86 specific dag so they match to the same pattern. This also makes sure later dag combine do not cause isel to miss them (e.g. promoting i16 to i32). llvm-svn: 102485
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Stuart Hastings authored
llvm-svn: 102477
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- Apr 27, 2010
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Evan Cheng authored
llvm-svn: 102456
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- Apr 26, 2010
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Evan Cheng authored
llvm-svn: 102366
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Evan Cheng authored
- Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue. - Teach spiller to modify DBG_VALUE instructions to reference spill slots. llvm-svn: 102323
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- Apr 25, 2010
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Dale Johannesen authored
form of DEBUG_VALUE, as it doesn't have reasonable default behavior for unsupported targets. Add a new hook instead. No functional change. llvm-svn: 102320
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- Apr 24, 2010
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Evan Cheng authored
llvm-svn: 102237
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- Apr 23, 2010
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Evan Cheng authored
llvm-svn: 102192
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- Apr 22, 2010
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Dan Gohman authored
and into SelectionDAGBuilder and FastISel. llvm-svn: 102123
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Evan Cheng authored
- Some code refactoring. llvm-svn: 102111
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- Apr 21, 2010
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Evan Cheng authored
llvm-svn: 101979
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Dale Johannesen authored
user-defined operations that use MMX register types, but the compiler shouldn't generate them on its own. This adds a Synthesizable abstraction to represent this, and changes the vector widening computation so it won't produce MMX types. (The motivation is to remove noise from the ABI compatibility part of the gcc test suite, which has some breakage right now.) llvm-svn: 101951
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- Apr 19, 2010
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Evan Cheng authored
llvm-svn: 101808
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- Apr 17, 2010
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Dan Gohman authored
const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
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Dan Gohman authored
MachineFunctionInfo subclasses. llvm-svn: 101634
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