Commits · a7adc3185bef02576a39f0198b26f584cc8a184d · Roger Ferrer / llvm-epi-0.8 · GitLab

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Mar 06, 2018
- [X86] Handle EAX being live when calling chkstk for x86_64 · a7adc318
  Martin Storsjo authored Mar 06, 2018
  a7adc318
- Revert "[DWARFv5] Emit file 0 to the line table." · 732e443b
  Paul Robinson authored Mar 06, 2018
  732e443b
- [DWARFv5] Emit file 0 to the line table. · d5069ba3
  Paul Robinson authored Mar 06, 2018
  d5069ba3
Mar 05, 2018
- GlobalISel: IRTranslate llvm.fabs.* intrinsic · 2bc42e90
  Volkan Keles authored Mar 05, 2018
  2bc42e90
- [AVR] Fix the test suite after r326500. · 6119b79a
  Dylan McKay authored Mar 05, 2018
  6119b79a
- [PowerPC] Do not emit record-form rotates when record-form andi suffices · 6cc31ca8
  Nemanja Ivanovic authored Mar 05, 2018
  6cc31ca8
- [x86] auto-generate full checks for fabs tests · 77ae82b8
  Sanjay Patel authored Mar 05, 2018
  77ae82b8
- [AArch64] Harden test case · f29e35af
  Evandro Menezes authored Mar 05, 2018
  f29e35af
- fix PR36582 · ac0bfb59
  Sebastian Pop authored Mar 05, 2018
  ac0bfb59
- [AArch64] Improve code generation of constant vectors · cd855f70
  Evandro Menezes authored Mar 05, 2018
  cd855f70
- AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACT · e31ab94e
  Matt Arsenault authored Mar 05, 2018
  e31ab94e
- AMDGPU/GlobalISel: Make some G_EXTRACTs legal · 71272e6d
  Matt Arsenault authored Mar 05, 2018
  71272e6d
- Pass Divergence Analysis data to Selection DAG to drive divergence · 2e5eecee
  Alexander Timofeev authored Mar 05, 2018
  2e5eecee
Mar 04, 2018
- [X86] Add a DAG combine to turn stores of vXi1 constants into scalar stores. · f2aae622
  Craig Topper authored Mar 04, 2018
  f2aae622
- [X86] Add a 32-bit mode command line to avx512-mask-op.ll. Add tests for... · 1209eb7d
  Craig Topper authored Mar 04, 2018
  1209eb7d
- [DAGCombiner] Add a peekThroughBitcast to MergeStoresOfConstantsOrVecElts to... · 4196dd12
  Craig Topper authored Mar 04, 2018
  4196dd12
- [X86][X87] Add X87 folded integer arithmetic tests · 8197b04b
  Simon Pilgrim authored Mar 04, 2018
  8197b04b
- [X86] Combine (store (v1i1 (scalar_to_vector (i8 X)))) -> (store (i8 X)). · a476026f
  Craig Topper authored Mar 04, 2018
  a476026f
- [X86] Lower v1i1/v2i1/v4i1/v8i1 load/stores to i8 load/store during op... · be31585b
  Craig Topper authored Mar 04, 2018
  be31585b
Mar 03, 2018
- [LegalizeVectorTypes] When scalarizing the operand of a unary op like TRUNC,... · dbf75c9c
  Craig Topper authored Mar 02, 2018
  dbf75c9c
Mar 02, 2018
- [Hexagon] Generate valignb for shifting shuffles (instead of vdelta) · e3e96323
  Krzysztof Parzyszek authored Mar 02, 2018
  e3e96323
- [SystemZ] Fix test cases after r326613 · 1785e244
  Ulrich Weigand authored Mar 02, 2018
  1785e244
- [SystemZ] Add support for anyregcc calling convention · 8b19be46
  Ulrich Weigand authored Mar 02, 2018
  8b19be46
- [SystemZ] Support stackmaps and patchpoints · 5eb64110
  Ulrich Weigand authored Mar 02, 2018
  5eb64110
- [SystemZ] Fix common-code users of stack size · 32063888
  Ulrich Weigand authored Mar 02, 2018
  32063888
- [SystemZ] Support vector registers in inline asm · 18f6930f
  Ulrich Weigand authored Mar 02, 2018
  18f6930f
- [Hexagon] Handle VACOPY in isel lowering · f608812b
  Krzysztof Parzyszek authored Mar 02, 2018
  f608812b
- [X86][BTVER2] Fix throughput of YMM bitwise instructions · 8cbc1d23
  Simon Pilgrim authored Mar 02, 2018
  8cbc1d23
- [X86] Reject xmm16-31 in inline asm constraints when AVX512 is disabled · 6b1419b5
  Craig Topper authored Mar 02, 2018
  6b1419b5
- [X86][x32] Save callee-save register used as base pointer for x32 ABI · 57feeed3
  Derek Schuff authored Mar 02, 2018
  57feeed3
- AMDGPU/GlobalISel: InstrMapping for G_ZEXT · b9699c00
  Matt Arsenault authored Mar 02, 2018
  b9699c00
- AMDGPU/GlobalISel: InstrMapping for G_TRUNC · 1c1aab99
  Matt Arsenault authored Mar 02, 2018
  1c1aab99
- AMDGPU/GlobalISel: Define InstrMappings for G_FCMP · ef8db767
  Matt Arsenault authored Mar 02, 2018
  ef8db767
- AMDGPU/GlobalISel: Define instruction mapping for @llvm.minnum · 2607dc60
  Matt Arsenault authored Mar 02, 2018
  2607dc60
- [ARM] Fix access to stack arguments when re-aligning SP in Armv6m · 505614bb
  Momchil Velikov authored Mar 02, 2018
  505614bb
- [MergeICmps] Revert 324317 "Enable the MergeICmps Pass by default." · c6638c81
  Clement Courbet authored Mar 02, 2018
  c6638c81
- [ARM] Fix codegen for VLD3/VLD4/VST3/VST4 with WB · 9deef20b
  Florian Hahn authored Mar 02, 2018
  9deef20b
- AMDGPU/GlobalISel: Define instruction mapping for @llvm.maxnum · b46c191c
  Matt Arsenault authored Mar 02, 2018
  b46c191c
- AMDGPU/GCN: Promote i16 ctpop · b283ea0f
  Jan Vesely authored Mar 02, 2018
  b283ea0f
- AMDGPU/GlobalISel: Define instruction mapping for G_FPTOSI · 41d2e3d9
  Matt Arsenault authored Mar 02, 2018
  41d2e3d9