Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W.

llvm-svn: 139484

llvm-svn: 139414

llvm-svn: 139381

llvm-svn: 139317

This patch was written by DeLesley Hutchins.

llvm-svn: 139300

llvm-svn: 139286

Speculatively try to fix our windows testers with a patch I found on the internet.

llvm-svn: 139279

llvm-svn: 139278

llvm-svn: 139267

The immediate offset of the non-writeback i8 form (encoding T4) allows
negative offsets only. The positive offset form of the encoding is the
LDRT instruction. Immediate offsets in the range [0,255] use encoding T3
instead.

llvm-svn: 139254

Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.

llvm-svn: 139250

name.

llvm-svn: 139220

llvm-svn: 139084

llvm-svn: 139048

Store a RecordVal's name as an Init to allow class-qualified Record
members to reference Records that have Init names.  We'll use this to
provide more programmability in how we name defs and their associated
members.

llvm-svn: 139031

llvm-svn: 139014

Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806.

llvm-svn: 138997

llvm-svn: 138948

On Python-w32 with mingw msys bash, %T was replaced to "x:\foo\bar...". msys bash cannot handle DOSish paths.

llvm-svn: 138852

Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.

llvm-svn: 138810

This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!

llvm-svn: 138804

Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807.

llvm-svn: 138795

llvm-svn: 138771

llvm-svn: 138703

Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.

llvm-svn: 138675

I'll clean up the rest of the XFAIL: vg_leak lines if this works.

llvm-svn: 138652

llvm-svn: 138640

Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678.

llvm-svn: 138552

Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.

llvm-svn: 138488

Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.

llvm-svn: 138445

llvm-svn: 138351

Patch by Micah Villmow!

llvm-svn: 138330

Win32 GetTempPath() tends to pick up %WINDIR% when neither TEMP nor TMP was found. %WINDIR% should not be treated writable on recent Windows OS.

llvm-svn: 138192

llvm-svn: 138191

llvm-svn: 138073

llvm-svn: 138067

Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid.  Only used for ARM UNPREDICTABLE instructions at the moment.
Patch by James Molloy.

llvm-svn: 137830

llvm-svn: 137806

llvm-svn: 137742

It turns out that the use of "__extension__" in these macros was disabling
the expected "incompatible pointer" warnings, so these type checks were not
doing anything anyway.  They introduced a serious bug by evaluating some
macro arguments twice, which is a big problem for arguments with side effects.
I'll have to find another way to get the right type checking.  Radar 9947657.

llvm-svn: 137680