if the inline ASM doesn't need a stack frame.

llvm-svn: 107922

llvm-svn: 107921

llvm-svn: 107920

llvm-svn: 107919

in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax

This fixes rdar://8127102.  I have several cleanup patches coming
next.

llvm-svn: 107917

returns the start of the memory operand for an instruction.

Introduce a new "X86AddrSegment" enum to reduce # magic numbers
referring to X86 memory operand layout.

llvm-svn: 107916

llvm-svn: 107915

variabes work.

llvm-svn: 107914

to a Tablegen implementation.

llvm-svn: 107913

created via T() where T is a class type.  Reviewed by chandlerc and
csilvers.

llvm-svn: 107911

priority as other constants. And, if we're in a place where we prefer
a pointer type, consider "nil" and "NULL" to be close matches.

llvm-svn: 107910

llvm-svn: 107907

.weak_def_can_be_hidden directive.  Chris pointed out that the MCAsmInfo.h/.cpp
chunks aren't needed for this until the compiler starts generating these.  And
when that happens it will be more convenient for it to be a bool than a const
char*.

llvm-svn: 107906

either integer values or other pointers. Fixes <rdar://problem/8134521>.

llvm-svn: 107905

llvm-svn: 107904

Reuse DIEInteger for 1. This is frequently used while emitting an attribute using dwarf::DW_FORM_flag form.

llvm-svn: 107903

involving operator precedence.)

llvm-svn: 107902

Patch by Alexander Kabaev.
PR 7595.

llvm-svn: 107900

This pass runs before COPY instructions are passed to copyPhysReg, so we simply
translate COPY to the proper pseudo instruction. Note that copyPhysReg does not
handle floating point stack copies.

Once COPY is used everywhere, this can be cleaned up a bit, and most of the
pseudo instructions can be removed.

llvm-svn: 107899

llvm-svn: 107898

llvm-svn: 107897

a template, be sure to include the template arguments from the
injected-class-name. Fixes PR7587.

llvm-svn: 107895

hack.

llvm-svn: 107894

llvm-svn: 107893

This pass can go away entirely soon.

llvm-svn: 107892

llvm-svn: 107891

words within the 64-bit D registers.  Use VLD1/VST1 with 64-bit elements
instead.

llvm-svn: 107890

llvm-svn: 107889

llvm-svn: 107887

llvm-svn: 107886

Introduce PCHReader::GetTranslationUnitDecl() and use it instead of ReadDeclRecord when initializing.

ReadDeclRecord would hit assertion if the translation unit declaration was already loaded during
IdentifierInfo initialization.

llvm-svn: 107885

llvm-svn: 107884

(by caching the result we save a potentially expensive dereference)

also use typedefs to shorten type declarations

llvm-svn: 107883

llvm-svn: 107882

llvm-svn: 107881

the simplification of frame index register scavenging to not have to check
for available registers directly and instead just let scavengeRegister()
handle it.

llvm-svn: 107880

EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.

Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.

llvm-svn: 107879

Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of
INSERT_SUBREG.

llvm-svn: 107878

ExtWarn to an Extension. Let the broken code propagate!

llvm-svn: 107875

surprised.

llvm-svn: 107874