information.  This allows arbitrary code involving DW_OP_plus_uconst
and DW_OP_deref.  The scheme allows for easy extention to include,
any, or all of the DW_OP_ opcodes.  I thought about just exposing all
of them, but, wasn't sure if people wanted the dwarf opcodes exposed
in the api.  Is that a layering violation?

With this scheme, the entire existing block scheme used by llvm-gcc
can be switched over to the new scheme.  I think that would be
cleaner, as then the compiler specific bits are not present in llvm
proper.  Before the old code can be yanked however, similar code in
clang would have to be removed.

Next up, more testing.

llvm-svn: 83120

llvm-svn: 83117

Lookup handler name only when assertions are enabled.

llvm-svn: 83114

llvm-svn: 83107

llvm-svn: 83105

llvm-svn: 83103

llvm-svn: 83102

Remove unnecessary cast.

llvm-svn: 83100

llvm-svn: 83083

so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are as we expect.

llvm-svn: 83081

the instruction we're scavenging for. The scavenger needs to know to avoid
them when analyzing register usage.

llvm-svn: 83077

llvm-svn: 83058

llvm-svn: 83033

slot for the register scavenger when compiling Thumb1 functions.

llvm-svn: 83023

llvm-svn: 83021

llvm-svn: 83019

llvm-svn: 83016

the operands, rather than trying to partition them into a start
and a step. This handles non-affine add recurrences correctly.

llvm-svn: 83011

llvm-svn: 83010

llvm-svn: 83008

llvm-svn: 83007

unused DECLARE instruction.

KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.

llvm-svn: 83006

llvm-svn: 83001

llvm-svn: 82999

llvm-svn: 82995

llvm-svn: 82994

llvm-svn: 82993

llvm-svn: 82991

llvm-svn: 82990

Otherwise, it is always set to "default", which prevents debug info from
even being generated during isel.  Radar 7250345.

llvm-svn: 82988

instruction. This makes it re-materializable.

Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.

llvm-svn: 82982

Disable rematting of it for now.

llvm-svn: 82975

phi nodes.  Make sure to phi translate from the right block. 

This fixes a llvm-building-llvm failure on GVN-PRE.cpp

llvm-svn: 82970

physical registers. This is especially critical for the later two since they
start the live interval of a super-register. e.g.
%DO<def> = INSERT_SUBREG %D0<undef>, %S0<kill>, 1
If this instruction is eliminated, the register scavenger will not be happy as
D0 is not defined previously.
This fixes PR5055.

llvm-svn: 82968

llvm-svn: 82953

the PassManager code into a regular verifyAnalysis method.

Also, reorganize loop verification. Make the LoopPass infrastructure
call verifyLoop as needed instead of having LoopInfo::verifyAnalysis
check every loop in the function after each looop pass. Add a new
command-line argument, -verify-loop-info, to enable the expensive
full checking.

llvm-svn: 82952

llvm-svn: 82951

code that stops the timer doesn't have to search to find the timer
object before it stops the timer. This avoids a lock acquisition
and a few other things done with the timer running.

llvm-svn: 82949

This should be better than single load from constpool.

llvm-svn: 82948

llvm-svn: 82947