llvm-svn: 74215

llvm-svn: 74204

llvm-svn: 74203

llvm-svn: 74199

to be shared, but how/where to privatize it is not immediately clear to me.

If any SelectionDAG experts see a better solution, please share!

llvm-svn: 74180

llvm-svn: 74179

Add section symbols to the symbol table

llvm-svn: 74170

null.

llvm-svn: 74147

llvm-svn: 74143

llvm-svn: 74140

llvm-svn: 74137

llvm-svn: 74134

llvm-svn: 74132

llvm-svn: 74114

This increases the maximum for MVT::LAST_VALUETYPE

This change doubles the allowable value for MVT::LAST_VALUETYPE. It does
this by doing several things.

1. Introduces MVT::MAX_ALLOWED_LAST_VALUETYPE which in this change has a
value of 64.  This value contains the current maximum for the
MVT::LAST_VALUETYPE.

2. Instead of checking "MVT::LAST_VALUETYPE <= 32", all of those uses
now become "MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_LAST_VALUETYPE"

3. Changes the dimension of the ValueTypeActions from 2 elements to four
elements and adds comments ahead of the declaration indicating the it is
"(MVT::MAX_ALLOWED_LAST_VALUETYPE/32) * 2".  This at least lets us find
what is affected if and when MVT::MAX_ALLOWED_LAST_VALUETYPE gets
changed.

4. Adds initializers for the new elements of ValueTypeActions.

This does NOT add any types in MVT. That would be done separately.

This doubles the size of ValueTypeActions from 64 bits to 128 bits and
gives us the freedom to add more types for AVX.

llvm-svn: 74110

llvm-svn: 74101

llvm-svn: 74097

a bunch of code from all the targets, and eliminates nondeterministic
ordering of directives being emitted in the output.

llvm-svn: 74096

llvm-svn: 74087

Get rid of the global CFGOnly flag by threading a ShortNames parameters through the GraphViz rendering code.
Update other uses in the codebase for this change.

llvm-svn: 74084

llvm-svn: 74082

llvm-svn: 74065

Fixed a bug in LiveInterval scaling (failure to scale VNI defs correctly), removed old TODO comments.

llvm-svn: 74054

Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode).

llvm-svn: 74053

Only pad when the section size > 0 and move the code that deals
with globals initializers to a place we know for sure the global
is initialized.

llvm-svn: 73944

types for the target (I think).  This was breaking
the PPC32 calling sequence.

llvm-svn: 73900

Fix another register coalescer crash: forgot to check if the instruction being updated has already been coalesced.

llvm-svn: 73898

llvm-svn: 73895

Support for .text relocations, implementing TargetELFWriter overloaded methods for x86/x86_64.
Use a map to track global values to their symbol table indexes
Code cleanup and small fixes

llvm-svn: 73894

llvm-svn: 73816

llvm-svn: 73786

llvm-svn: 73784

taking so long to get to this!

llvm-svn: 73757

llvm-svn: 73750

llvm-svn: 73738

llvm-svn: 73736

llvm-svn: 73727

On Darwin, ams printer should output a second label before a jump table so the linker knows it's a new atom. But this is only needed if the jump table is put in a separate section from the function body.

llvm-svn: 73720

- Update register allocation hint after coalescing. This is done by the target since the hint is target dependent. This is important for ARM register pair hints.
- Register allocator should resolve the second part of the hint (register number) before passing it to the target since it knows virtual register to physical register mapping.
- More fixes to get ARM load / store double word working.

llvm-svn: 73671

llvm-svn: 73634