Implement proper handling for pcmpistri/pcmpestri intrinsics. Requires custom handling in DAGISelToDAG due to limitations in TableGen's implicit def handling. Fixes PR11305.

llvm-svn: 161318

llvm-svn: 161306

Use a COPY node instead of an explicit MOVA opcode in the custom insterter for pcmpestrm/pcmpistrm. Allows the register allocator to handle it better and prevent wasted identity moves.

llvm-svn: 161305

On PPC64, this can be done with a simple TableGen pattern.
To enable this, I've added the (otherwise missing) readcyclecounter
SDNode definition to TargetSelectionDAG.td.

llvm-svn: 161302

llvm-svn: 161301

(this corresponds by spilling/reloading regs in DTriple / DQuad reg classes).
No testcase, found by inspection.

llvm-svn: 161300

were missed for no reason. This fixes PR13377

llvm-svn: 161299

Change these to patterns.
2. Add another 16 instructions.

Patch by Reed Kotler.

llvm-svn: 161272

this makes this hack a bit more bearable
for poor souls who need to pass custom
preprocessor flags to the build process

llvm-svn: 161240

Fast isel doesn't currently have support for translating builtin function
calls to target instructions.  For embedded environments where the library
functions are not available, this is a matter of correctness and not
just optimization.  Most of this patch is just arranging to make the
TargetLibraryInfo available in fast isel.  <rdar://problem/12008746>

llvm-svn: 161232

This just provides a way to look up a LibFunc::Func enum value for a
function name.  Alphabetize the enums and function names so we can use a
binary search.

llvm-svn: 161231

llvm-svn: 161230

but somehow managed to be dropped later.

Patch by Karel Gardas.

llvm-svn: 161226

llvm-svn: 161222

llvm-svn: 161220

Now that TableGen supports references to NAME w/o it being explicitly
referenced in the definition's own name, use that to simplify
assembly InstAlias definitions in multiclasses.

llvm-svn: 161218

Add more comments and use early returns to reduce nesting in isLoadFoldable.
Also disable folding for V_SET0 to avoid introducing a const pool entry and
a const pool load.

rdar://10554090 and rdar://11873276

llvm-svn: 161207

of MipsTargetMachine.cpp.

llvm-svn: 161191

test o32_cc_vararg.ll.

llvm-svn: 161189

llvm-svn: 161163

llvm-svn: 161162

llvm-svn: 161161

llvm-svn: 161159

Machine CSE and other optimizations can remove instructions so folding
is possible at peephole while not possible at ISel.

This patch is a rework of r160919 and was tested on clang self-host on my local
machine.

rdar://10554090 and rdar://11873276

llvm-svn: 161152

llvm-svn: 161143

llvm-svn: 161134

llvm-svn: 161133

llvm-svn: 161132

llvm-svn: 161122

llvm-svn: 161110

Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data.

llvm-svn: 161101

No new test case is added.
This patch makes test JITTest.FunctionIsRecompiledAndRelinked pass on mips
platform.

Patch by Petar Jovanovic.

llvm-svn: 161098

llvm-svn: 161095

instructions that decrement and increment the stack pointer before and after a
call when the function does not have a reserved call frame.

llvm-svn: 161093

MipsSERegisterInfo.

llvm-svn: 161092

MipsSEFrameLowering.

Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be
reserved if there is a call with a large call frame or there are variable sized
objects on the stack.

llvm-svn: 161090

llvm-svn: 161083

and MipsSEInstrInfo (for mips32/64).

llvm-svn: 161081

of them.

llvm-svn: 161080

computing it in MipsFrameLowering::emitPrologue.

llvm-svn: 161078