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  1. Feb 12, 2013
    • Kay Tiong Khoo's avatar
      Added 0x0D to 2-byte opcode extension table for prefetch* variants · ab588efe
      Kay Tiong Khoo authored
      Fixed decode of existing 3dNow prefetchw instruction
      Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs
      
      llvm-svn: 174920
      ab588efe
    • Lang Hames's avatar
      When generating IR for default copy-constructors, copy-assignment operators, · 5824a4f1
      Lang Hames authored
      move-constructors and move-assignment operators, use memcpy to copy adjacent
      POD members.
      
      Previously, classes with one or more Non-POD members would fall back on
      element-wise copies for all members, including POD members. This often
      generated a lot of IR. Without padding metadata, it wasn't often possible
      for the LLVM optimizers to turn the element-wise copies into a memcpy.
      
      This code hasn't yet received any serious tuning. I didn't see any serious
      regressions on a self-hosted clang build, or any of the nightly tests, but
      I think it's important to get this out in the wild to get more testing.
      Insights, feedback and comments welcome.
      
      Many thanks to David Blaikie, Richard Smith, and especially John McCall for
      their help and feedback on this work.
      
      llvm-svn: 174919
      5824a4f1
    • Tanya Lattner's avatar
      Timing data was removed years ago. Remove these links. · d7fe06f2
      Tanya Lattner authored
      llvm-svn: 174918
      d7fe06f2
    • Michael J. Spencer's avatar
      [ELF] Add support for reading dynamic libraries. · c3c8bc1e
      Michael J. Spencer authored
      llvm-svn: 174916
      c3c8bc1e
    • Hal Finkel's avatar
      BBVectorize: Don't over-search when building the dependency map · 6ae564b4
      Hal Finkel authored
      When building the pairable-instruction dependency map, don't search
      past the last pairable instruction. For large blocks that have been
      divided into multiple instruction groups, searching past the last
      instruction in each group is very wasteful. This gives a 32% speedup
      on the csa.ll test case from PR15222 (when using 50 instructions
      in each group).
      
      No functionality change intended.
      
      llvm-svn: 174915
      6ae564b4
    • Hal Finkel's avatar
      BBVectorize: Omit unnecessary entries in PairableInstUsers · 39a95032
      Hal Finkel authored
      This map is queried only for instructions in pairs of pairable
      instructions; so make sure that only pairs of pairable
      instructions are added to the map. This gives a 3.5% speedup
      on the csa.ll test case from PR15222.
      
      No functionality change intended.
      
      llvm-svn: 174914
      39a95032
  2. Feb 11, 2013
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