llvm-svn: 47416

New helper function getMBBFromIndex() that given an index in any instruction of an MBB returns a pointer the MBB. Reviewed by Evan.

llvm-svn: 47267

register defs and uses after each successful coalescing.
- Also removed a number of hacks and fixed some subtle kill information bugs.

llvm-svn: 47167

Fix a potential serious problem where kills belonging to the val# defined by a two-address instruction is also on the val# that defines the input.

llvm-svn: 47057

llvm-svn: 46930

llvm-svn: 46896

Move some functionality for adding flags to MachineInstr's into methods on MachineInstr rather than LiveVariables.

llvm-svn: 46295

llvm-svn: 45831

llvm-svn: 45830

llvm-svn: 45815

Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695

llvm-svn: 45689

that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

llvm-svn: 45673

llvm-svn: 45667

preserved.

llvm-svn: 45596

that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467

  - Eliminate the static "print" method for operands, moving it
    into MachineOperand::print.
  - Change various set* methods for register flags to take a bool
    for the value to set it to.  Remove unset* methods.
  - Group methods more logically by operand flavor in MachineOperand.h

llvm-svn: 45461

llvm-svn: 45418

Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.

llvm-svn: 44960

llvm-svn: 44838

llvm-svn: 44727

  isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702

llvm-svn: 44660

Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.

llvm-svn: 44644

llvm-svn: 44612

llvm-svn: 44611

llvm-svn: 44610

llvm-svn: 44609

  This allows an important optimization to be re-enabled.
- If all uses / defs of a split interval can be folded, give the interval a
  low spill weight so it would not be picked in case spilling is needed (avoid
  pushing other intervals in the same BB to be spilled).

llvm-svn: 44601

llvm-svn: 44565

llvm-svn: 44532

llvm-svn: 44531

llvm-svn: 44517

llvm-svn: 44482

llvm-svn: 44479

llvm-svn: 44467

llvm-svn: 44443

in the middle of a split basic block, create a new live interval starting at
the def. This avoid artifically extending the live interval over a number of
cycles where it is dead. e.g.

bb1:
       = vr1204   (use / kill) <= new interval starts and ends here.
...
...
vr1204 =          (new def)   <= start a new interval here.
       = vr1204   (use)

llvm-svn: 44436

llvm-svn: 44434