- Nov 25, 2008
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Dan Gohman authored
introduce any new spilling; it just uses unused registers. Refactor the SUnit topological sort code out of the RRList scheduler and make use of it to help with the post-pass scheduler. llvm-svn: 59999
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Scott Michel authored
llvm-svn: 59998
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Daniel Dunbar authored
llvm-svn: 59997
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Zhongxing Xu authored
llvm-svn: 59995
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Bill Wendling authored
llvm-svn: 59992
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- Nov 24, 2008
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Chris Lattner authored
llvm-svn: 59990
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Chris Lattner authored
llvm-svn: 59989
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Fariborz Jahanian authored
is imported from a protocol into the implementation. llvm-svn: 59988
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Sebastian Redl authored
llvm-svn: 59987
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Chris Lattner authored
llvm-svn: 59986
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Chris Lattner authored
llvm-svn: 59985
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Ted Kremenek authored
llvm-svn: 59983
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Ted Kremenek authored
properly reversed once constructed. This fixes PR 3125: http://llvm.org/bugs/show_bug.cgi?id=3125 llvm-svn: 59982
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Bill Wendling authored
llvm-svn: 59981
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Sebastian Redl authored
llvm-svn: 59979
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Dan Gohman authored
simplify header dependencies for front-ends that just want to choose a scheduler and don't need all the scheduling machinery declarations. llvm-svn: 59978
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Dan Gohman authored
llvm-svn: 59977
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Chris Lattner authored
llvm-svn: 59976
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Sebastian Redl authored
llvm-svn: 59975
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Sebastian Redl authored
There might be other, similar bugs lurking there. llvm-svn: 59974
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Ted Kremenek authored
llvm-svn: 59973
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Chris Lattner authored
with an undef. llvm-svn: 59972
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Bill Wendling authored
- Mark "add with overflow" as having a custom lowering for X86. Give it a null lowering representation for now. llvm-svn: 59971
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Scott Michel authored
(a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to directly zero-extend i32 to i64, but use rotates and shifts for sign extension. Also ensure unified register consistency. (b) Add new test harness for i64 operations: i64ops.ll llvm-svn: 59970
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Dan Gohman authored
to removePred because an SUnit can both data-depend and anti-depend on the same SUnit. llvm-svn: 59969
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Dan Gohman authored
llvm-svn: 59968
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Dan Gohman authored
obscure tail-merging opportunities. llvm-svn: 59967
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Dan Gohman authored
llvm-svn: 59966
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Scott Michel authored
(a) Improve the extract element code: there's no need to do gymnastics with rotates into the preferred slot if a shuffle will do the same thing. (b) Rename a couple of SPUISD pseudo-instructions for readability and better semantic correspondence. (c) Fix i64 sign/any/zero extension lowering. llvm-svn: 59965
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Dan Gohman authored
llvm-svn: 59964
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Dan Gohman authored
llvm-svn: 59963
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Dan Gohman authored
llvm-svn: 59962
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Matthijs Kooijman authored
llvm-svn: 59961
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Duncan Sands authored
(this doesn't happen that often, since most code does not use illegal types) then follow it by a DAG combiner run that is allowed to generate illegal operations but not illegal types. I didn't modify the target combiner code to distinguish like this between illegal operations and illegal types, so it will not produce illegal operations as well as not producing illegal types. llvm-svn: 59960
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Matthijs Kooijman authored
llvm-svn: 59958
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Zhongxing Xu authored
One design problem that is emerging is the signed-ness problem during static analysis. Many unsigned value have to be converted into signed value because it partipates in operations with signed values. On the other hand, we cannot blindly make all values occuring in static analysis signed, because we do have cases where unsignedness is required, for example, integer overflow detection. llvm-svn: 59957
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Zhongxing Xu authored
llvm-svn: 59956
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Torok Edwin authored
noalias attribute parameters/return values. llvm-svn: 59955
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Zhongxing Xu authored
llvm-svn: 59954
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Evan Cheng authored
Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. llvm-svn: 59953
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