into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.

No functionality changes.

llvm-svn: 114428

pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.

llvm-svn: 114411

llvm-svn: 114410

llvm-svn: 114409

"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.

llvm-svn: 114406

of the getLoad methods.  This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).

llvm-svn: 114404

into non-segment-relative copies.

llvm-svn: 114402

instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.

llvm-svn: 114401

llvm-svn: 114400

MachinePointerInfo.  Among other virtues, this doesn't silently  truncate the
svoffset to 32-bits.

llvm-svn: 114399

llvm-svn: 114397

eliminating some weird "infer a frame address" logic which was dead.

llvm-svn: 114396

llvm-svn: 114395

MachinePointerInfo, propagating the type out a level of API.  Remove
the old MachineFunction::getMachineMemOperand impl.

llvm-svn: 114393

llvm-svn: 114391

to the MachineFunction construction methods.

llvm-svn: 114390

MachinePointerInfo struct, no functionality change.

This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.

llvm-svn: 114389

For now, just disable folding the load into the call.

llvm-svn: 114386

llvm-svn: 114383

llvm-svn: 114382

define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372

CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.

llvm-svn: 114348

between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635

llvm-svn: 114340

llvm-svn: 114339

llvm-svn: 114338

Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution.

llvm-svn: 114320

llvm-svn: 114313

r114268 fixed the last of the blockers to enabling it.  I will be monitoring
for failures.

llvm-svn: 114312

llvm-svn: 114310

llvm-svn: 114304

llvm-svn: 114303

llvm-svn: 114302

llvm-svn: 114297

Patch by Che-Liang Chiou <clchiou@gmail.com>!

llvm-svn: 114294

llvm-svn: 114292

llvm-svn: 114285

llvm-svn: 114284

llvm-svn: 114278

llvm-svn: 114277

llvm-svn: 114273