llvm-svn: 74378

implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.

llvm-svn: 74372

Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work.

llvm-svn: 74336

llvm-svn: 74334

llvm-svn: 74328

llvm-svn: 74327

llvm-svn: 74316

llvm-svn: 74313

llvm-svn: 74310

llvm-svn: 74255

llvm-svn: 74186

from the asmprinter.

llvm-svn: 74184

llvm-svn: 74154

No need to code gen MDNodes

llvm-svn: 74150

picbase instead of inlining it.

llvm-svn: 74111

llvm-svn: 74105

llvm-svn: 74101

llvm-svn: 74097

a bunch of code from all the targets, and eliminates nondeterministic
ordering of directives being emitted in the output.

llvm-svn: 74096

llvm-svn: 74094

gv and hiddengv stub printing.

llvm-svn: 74093

llvm-svn: 74092

llvm-svn: 74091

decorateName like other stuff instead of special casing _.  Also, stick
it into GVStubs and let the normal stub printer print the stub instead 
of doing it manually.

llvm-svn: 74090

llvm-svn: 74089

llvm-svn: 74067

llvm-svn: 74066

llvm-svn: 73841

llvm-svn: 73837

llvm-svn: 73836

with MBB's.

llvm-svn: 73830

it as a pcrel immediate instead.  This gets pc-rel weirdness out of the
main printoperand codepath.

llvm-svn: 73829

llvm-svn: 73818

LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.

Implement support for printing mbb labels as operands.

llvm-svn: 73817

llvm-svn: 73813

step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.

llvm-svn: 73810

on X86.  Not useful yet.

llvm-svn: 73799

llvm-svn: 73792

llvm-svn: 73784

implementation.  The idea is that we want asmprinting to
work by converting MachineInstrs into a new MCInst class,
then the per-instruction asmprinter works on MCInst.  MCInst
and the new asmprinters will not depend on most of the 
llvm code generators.  This allows building diassemblers
that don't link in the whole llvm code generator.  This is
step #1 of many.

llvm-svn: 73743