test1:
        movl $N, %eax
        movl %eax, G
        ret

emit:

test1:
        movl $N, G
        ret

llvm-svn: 21407

printf format strings and other stuff.  Instead of generating this:

        movl $l1__2E_str_1, %eax
        movl %eax, (%esp)

we now emit:

        movl $l1__2E_str_1, (%esp)

llvm-svn: 21406

Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
  0 == off
  1 == on
  2 == target default

llvm-svn: 21309

Olden/mst, Ptrdist/bc, Obsequi, etc.

llvm-svn: 21274

llvm-svn: 21267

llvm-svn: 21181

llvm-svn: 21164

llvm-svn: 21146

properly sign extending the top of the result of a 64-bit shift right by
a constant > 32.

llvm-svn: 21120

llvm-svn: 21107

llvm-svn: 21106

llvm-svn: 21015

llvm-svn: 21010

llvm-svn: 21006

llvm-svn: 21005

llvm-svn: 20990

llvm-svn: 20936

llvm-svn: 20842

llvm-svn: 20812

request.

llvm-svn: 20804

llvm-svn: 20651

Bill Wendling!!

llvm-svn: 20649

using Function::arg_{iterator|begin|end}.  Likewise Module::g* -> Module::global_*.

This patch is contributed by Gabor Greif, thanks!

llvm-svn: 20597

to cygwin)

llvm-svn: 20520

llvm-svn: 20343

llvm-svn: 20284

llvm-svn: 19835

of FP ops.

llvm-svn: 19834

llvm-svn: 19798

all.  This should speed up the X86 backend fairly significantly on integer
codes.  Now if only we didn't have to compute livevar still... ;-)

llvm-svn: 19796

doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.

llvm-svn: 19775

llvm-svn: 19733

llvm-svn: 19731

llvm-svn: 19728

fixes most of the remaining llc-beta failures.

llvm-svn: 19716

llvm-svn: 19711

pressure, not decreases register pressure.  Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail.  This fixes
fourinarow.

llvm-svn: 19697

llvm-svn: 19694

typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles).  This also saves code space.

For example, instead of emitting:

rotr:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %CL, BYTE PTR [%ESP + 8]
        shrd %EAX, %EAX, %CL
        ret
rotli:
        mov %EAX, DWORD PTR [%ESP + 4]
        shrd %EAX, %EAX, 27
        ret

Emit:

rotr32:
        mov %CL, BYTE PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, %CL
        ret
rotli32:
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, 27
        ret

We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.

llvm-svn: 19692

llvm-svn: 19690