llvm-svn: 139622

llvm-svn: 139616

This function is used to flag values where the complement interval may
overlap other intervals.  Call it from overlapIntv, and use the flag to
fully recompute those live ranges in transferValues().

llvm-svn: 139612

Teach the Thumb ASM parser that BKPT is allowed in IT blocks, even though it is always executed unconditionally.

llvm-svn: 139610

llvm-svn: 139608

llvm-svn: 139607

llvm-svn: 139606

Three out of four clients prefer this interface which is consistent with
extendIntervalEndTo() and LiveRangeCalc::extend().

llvm-svn: 139604

The complement interval may overlap the other intervals created, so use
a separate LiveRangeCalc instance to compute its live range.

A LiveRangeCalc instance can only be shared among non-overlapping
intervals.

llvm-svn: 139603

Only disassembler instructions with vvvv != 1111 if the instruction actually uses the vvvv field to encode an operand. Fixes PR10851.

llvm-svn: 139591

Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848.

llvm-svn: 139588

Fix encoding of VMOVDQU to not simultaneously be 'TB OpSize' and 'XS'. 'XS' is correct and seems to have been taking priority.

llvm-svn: 139587

llvm-svn: 139583

llvm-svn: 139581

llvm-svn: 139579

llvm-svn: 139575

llvm-svn: 139574

llvm-svn: 139573

SplitKit will soon need two copies of these data structures, and the
algorithms will also be useful when LiveIntervalAnalysis becomes
independent of LiveVariables.

llvm-svn: 139572

llvm-svn: 139571

llvm-svn: 139565

Fix the assembler strings for a couple of atomic instructions.  Doesn't really matter much in practice, but it's a bit cleaner.

llvm-svn: 139563

llvm-svn: 139559

destination types are equal!

llvm-svn: 139553

Splitting a landing pad takes considerable care because of PHIs and other
nasties. The problem is that the jump table needs to jump to the landing pad
block. However, the landing pad block can be jumped to only by an invoke
instruction. So we clone the landingpad instruction into its own basic block,
have the invoke jump to there. The landingpad instruction's basic block's
successor is now the target for the jump table.

But because of PHI nodes, we need to create another basic block for the jump
table to jump to. This is definitely a hack, because the values for the PHI
nodes may not be defined on the edge from the jump table. But that's okay,
because the jump table is simply a construct to mimic what is happening in the
CFG. So the values are mysteriously there, even though there is no value for the
PHI from the jump table's edge (hence calling this a hack).

llvm-svn: 139545

llvm-svn: 139542

llvm-svn: 139541

llvm-svn: 139537

No tests; these changes aren't really interesting in the sense that the logic is the same for volatile and atomic.

I believe this completes all of the changes necessary for the optimizer to handle loads and stores correctly.  I'm going to try and come up with some additional testing, though.

llvm-svn: 139533

There's no need to add additional predicate operands when converting a tB to a tBfar now.  Fixes nightly test failures on armv6 Thumb.  <rdar://problem/10110404>

llvm-svn: 139531

llvm-svn: 139530

However with this fix it does now.

Basically the operand order for the x86 target specific node
is not the same as the instruction, but since the intrinsic need that
specific order at the instruction definition, just change the order
during legalization. Also, there were some wrong invertions of condition
codes, such as GE => LE, GT => LT, fix that too. Fix PR10907.

llvm-svn: 139528

llvm-svn: 139527

llvm-svn: 139526

llvm-svn: 139525

Port more encoding tests to decoding tests, and correct an improper Thumb2 pre-indexed load decoding this uncovered.

llvm-svn: 139522

llvm-svn: 139517

llvm-svn: 139515

llvm-svn: 139503

It has been enabled by default for a while, it was only there to allow
performance comparisons.

llvm-svn: 139501