llvm-svn: 11756

llvm-svn: 11755

llvm-svn: 11754

llvm-svn: 11753

llvm-svn: 11752

llvm-svn: 11751

llvm-svn: 11750

llvm-svn: 11749

block into MachineBasicBlock::getFirstTerminator().

This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).

llvm-svn: 11748

block we are in might be empty

llvm-svn: 11744

eventually get an assignment due to elimination of PHIs.

llvm-svn: 11743

llvm-svn: 11742

llvm-svn: 11741

whether this is the sign bit or not, so check unsigned comparisons as well.

llvm-svn: 11740

llvm-svn: 11739

Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr

llvm-svn: 11738

llvm-svn: 11737

llvm-svn: 11736

llvm-svn: 11735

with "predication"

llvm-svn: 11734

llvm-svn: 11733

Simplify iterator usage now that we have next(). Also don't pass iterators by reference now that MachineInstr* are in an ilist

llvm-svn: 11732

llvm-svn: 11731

llvm-svn: 11730

llvm-svn: 11729

llvm-svn: 11728

llvm-svn: 11727

Implement cast Type::ULongTy -> double

llvm-svn: 11726

llvm-svn: 11724

Fix comments in PhysRegTracker and rename isPhysRegAvail to isRegAvail to be consistent with the other two

llvm-svn: 11723

llvm-svn: 11722

llvm-svn: 11721

llvm-svn: 11720

llvm-svn: 11719

use FP instructions.  This reduces the number of instructions inserted in
176.gcc (for example) from 58074 to 101 (it doesn't use much FP, which
is typical).  This reduction speeds up the entire code generator.  In the
case of 176.gcc, llc went from taking 31.38s to 24.78s.  The passes that
sped up the most are the register allocator and the 2 live variable analysis
passes, which sped up 2.3, 1.3, and 1.5s respectively.  The asmprinter
pass also sped up because it doesn't print the instructions in comments :)

Note that this patch is likely to expose latent bugs in machine code passes,
because now basicblock can be empty, where they were never empty before.  I
cleaned out regalloclocal, but who knows about linscan :)

llvm-svn: 11717

llvm-svn: 11716

switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).

llvm-svn: 11715

one terminator instruction in each basic block.

llvm-svn: 11714

Also, make an assertion actually fireable!

llvm-svn: 11713

AFTER the GEP that was emitted.  :(

llvm-svn: 11712