Commits · b929a0062e485f7747c5e849f5569e79afb8ae4d · Roger Ferrer / llvm-epi-0.8 · GitLab

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May 02, 2019
- [X86] Remove the redundant suffix in vfpclassp[d,s]'s broadcasting variant · b929a006
  Craig Topper authored May 02, 2019
  b929a006
May 01, 2019
- [AMDGPU] gfx1010 MIMG implementation · 692560dc
  Stanislav Mekhanoshin authored May 01, 2019
  692560dc
- [AMDGPU] gfx1010 DS implementation · a224f68a
  Stanislav Mekhanoshin authored May 01, 2019
  a224f68a
- [tests] Add host-byteorder-*-endian; update XFAILs of big-endian triples · 02d055a2
  Hubert Tong authored May 01, 2019
  02d055a2
- [llvm-objdump] Print newlines before and after "Disassembly of section ...:" · 5387c2cd
  Fangrui Song authored May 01, 2019
  5387c2cd
- [llvm-readobj] Change -t to --symbols in tests. NFC · 6afcdcf9
  Fangrui Song authored May 01, 2019
  6afcdcf9
- [llvm-readobj] llvm-readobj --elf-output-style=GNU => llvm-readelf. NFC · 97c17e83
  Fangrui Song authored May 01, 2019
  97c17e83
- [llvm-readobj] Change -long-option to --long-option in tests. NFC · e29e30b1
  Fangrui Song authored May 01, 2019
  e29e30b1
- [AMDGPU] gfx1010 VMEM and SMEM implementation · a6322941
  Stanislav Mekhanoshin authored Apr 30, 2019
  a6322941
Apr 30, 2019
- [WebAssembly] Fix test after r359602 · 397ca2f2
  Dan Gohman authored Apr 30, 2019
  397ca2f2
Apr 29, 2019
- [AArch64][SVE] Asm: add aliases for unpredicated bitwise logical instructions · 2c0d5043
  Cullen Rhodes authored Apr 29, 2019
  2c0d5043
- [X86] Remove some intel syntax aliases on (v)cvtpd2(u)dq, (v)cvtpd2ps,... · 9202d5f8
  Craig Topper authored Apr 29, 2019
  9202d5f8
Apr 27, 2019
- [llvm-nm][llvm-readelf] Avoid single-dash -long-option in tests · 763a2e1f
  Fangrui Song authored Apr 27, 2019
  763a2e1f
- [AMDGPU] gfx1010 VOPC implementation · 4f331cb1
  Stanislav Mekhanoshin authored Apr 26, 2019
  4f331cb1
Apr 26, 2019
- [AMDGPU] gfx1010 VOP3 and VOP3P implementation · 61beff02
  Stanislav Mekhanoshin authored Apr 26, 2019
  61beff02
- [AMDGPU] gfx1010 VOP2 changes · 8f3da70e
  Stanislav Mekhanoshin authored Apr 26, 2019
  8f3da70e
Apr 24, 2019
- [AMDGPU] gfx1010 SOP instructions · 9d287358
  Stanislav Mekhanoshin authored Apr 24, 2019
  9d287358
- [AMDGPU] gfx1010 sgpr register changes · 33d806a5
  Stanislav Mekhanoshin authored Apr 24, 2019
  33d806a5
Apr 23, 2019
- [RISCV] Support assembling %tls_{ie,gd}_pcrel_hi modifiers · df3cb477
  Lewis Revill authored Apr 23, 2019
  df3cb477
- ARM: disallow add/sub to sp unless Rn is also sp. · 6af366be
  Tim Northover authored Apr 23, 2019
  6af366be
- [llvm-mc] - Properly set the the address align field of the compressed sections. · b9ed9cb5
  George Rimar authored Apr 23, 2019
  b9ed9cb5
Apr 22, 2019
- [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier · e2707f5a
  Dmitry Preobrazhensky authored Apr 22, 2019
  e2707f5a
Apr 19, 2019
- [llvm] Prevent duplicate files in debug line header in dwarf 5: another attempt · 783d84bb
  Ali Tamur authored Apr 19, 2019
  783d84bb
Apr 17, 2019
- [AMDGPU][MC] Corrected handling of "-" before expressions · 394d0a16
  Dmitry Preobrazhensky authored Apr 17, 2019
  394d0a16
- [AMDGPU][MC] Corrected parsing of registers · 20d52e3a
  Dmitry Preobrazhensky authored Apr 17, 2019
  20d52e3a
Apr 15, 2019
- Add slbfee instruction. · 8d856488
  Sean Fertile authored Apr 15, 2019
  8d856488
Apr 13, 2019
- [WebAssembly] Add DataCount section to object files · fef8de66
  Thomas Lively authored Apr 12, 2019
  fef8de66
Apr 11, 2019
- [RISCV] Diagnose invalid second input register operand when using %tprel_add · b621f041
  Roger Ferrer Ibanez authored Apr 11, 2019
  b621f041
Apr 10, 2019
- [X86] Move the 2 byte VEX optimization for MOV instructions back to the... · 391d5caa
  Craig Topper authored Apr 10, 2019
  391d5caa
- [X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2si with the {evex}... · 9ca3a95f
  Craig Topper authored Apr 10, 2019
  9ca3a95f
Apr 09, 2019
- [X86] Add support for {vex2}, {vex3}, and {evex} to the assembler to match... · 8e2871cd
  Craig Topper authored Apr 09, 2019
  8e2871cd
Apr 04, 2019
- [WebAssembly] Add new explicit relocation types for PIC relocations · 2a7cac93
  Sam Clegg authored Apr 04, 2019
  2a7cac93
- [RISCV] Support assembling TLS add and associated modifiers · aa79a3fe
  Lewis Revill authored Apr 04, 2019
  aa79a3fe
- [AArch64][AsmParser] Fix .arch_extension directive parsing · 772e4734
  Sander de Smalen authored Apr 04, 2019
  772e4734
Apr 03, 2019
- [AArch64] Update v8.5a MTE LDG/STG instructions · 5820db93
  Javed Absar authored Apr 03, 2019
  5820db93
Apr 02, 2019
- [PowerPC] Fix reversed bit issue in DCMX mask for "xvtstdcdp" and "xvtstdcsp" P9 implementation · fa6cd5ce
  Stefan Pintilie authored Apr 02, 2019
  fa6cd5ce
- [RISCV] Support assembling @plt symbol operands · f8078f6b
  Alex Bradbury authored Apr 02, 2019
  f8078f6b
Apr 01, 2019
- [AArch64] Add v8.5-a Memory Tagging STZGM instruction · 3d233d5d
  David Spickett authored Apr 01, 2019
  3d233d5d
- [AArch64] Add v8.5-a Memory Tagging STGM/LDGM instructions · 9142b8ef
  David Spickett authored Apr 01, 2019
  9142b8ef
- [AArch64] Add v8.5-a Memory Tagging GMID_EL1 register · efe376ad
  David Spickett authored Apr 01, 2019
  efe376ad