llvm-svn: 177015

Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit set. The VEX.B was being calculated from the wrong operand. Fixes at least some portion of PR14185.

llvm-svn: 177014

Teach X86 MC instruction lowering that VMOVAPSrr and other VEX-encoded register to register moves should be switched from using the MRMSrcReg form to the MRMDestReg form if the source register is a 64-bit extended register and the destination register is not. This allows the instruction to be encoded using the 2-byte VEX form instead of the 3-byte VEX form. The GNU assembler has similar behavior.

llvm-svn: 177011

- Fix the typo on type checking

llvm-svn: 177010

llvm-svn: 177009

something else and forgot to remove.

llvm-svn: 177007

llvm-svn: 177006

llvm-svn: 177005

constructs default arguments. It can now take default arguments from
cl::opt'ions. Add a new -default-gcov-version=... option, and actually test it!

Sink the reverse-order of the version into GCOVProfiling, hiding it from our
users.

llvm-svn: 177002

llvm-svn: 176997

llvm-svn: 176996

Clients of MemoryBuffer::getOpenFile expect it not to take ownership of the file
descriptor passed in. So don't.

llvm-svn: 176995

emitProfileNotes(), similar to emitProfileArcs(). Also update its comment.

Also add a comment on Version[4] (there will be another comment in clang later),
and compress lines that exceeded 80 columns.

llvm-svn: 176994

llvm-svn: 176993

(extra cleanup/fallout from r176983 - not sure why I didn't catch this locally)

llvm-svn: 176988

This doesn't reset all of the target options within the TargetOptions
object. This is because some of those are ABI-specific and must be determined if
it's okay to change those on the fly.

llvm-svn: 176986

llvm-svn: 176984

llvm-svn: 176983

codegen passes. This brings it in to line with clang and llc's codegen setup,
and tidies up the code.

If I understand correctly, adding ModulePasses to a FunctionPassManager is
bogus. It only seems to explode if an added ModulePass depends on a
FunctionPass though, which might be why this code has survived so long.

Fixes <rdar://problem/13386816>.

llvm-svn: 176977

Summary: No functionality change.

Reviewers: Bigcheese

Reviewed By: Bigcheese

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D535

llvm-svn: 176973

up putback to clang for mips16.

llvm-svn: 176968

llvm-svn: 176967

llvm-svn: 176963

llvm-svn: 176962

We have the same assertion in createVirtualRegister.

llvm-svn: 176959

In r176898 I updated the cost model to reflect the fact that sext/zext/cast on
v8i32 <-> v8i8 and v16i32 <-> v16i8 are expensive.

This test case is so that we make sure to update the cost model once we fix
CodeGen.

llvm-svn: 176955

Only combine when the shl is only used by the icmp

llvm-svn: 176950

sigh.

llvm-svn: 176946

It is required when building tests with ASan or MSan.

llvm-svn: 176941

This is needed to get symbolized stack traces when running LLVM tests under (A|M)San.

llvm-svn: 176933

llvm-svn: 176930

mips16 and MipsSETargetLowering is for mips32/64. 

No functionality changes.

llvm-svn: 176917

This is the next step towards making the metadata for DIScopes have a common
prefix rather than having to delegate based on their tag type.

llvm-svn: 176913

This was tickled by a Clang diagnostic; Clang test case to follow.

llvm-svn: 176911

llvm-svn: 176910

Patch by Paul Robinson.

llvm-svn: 176908

This could be 'null' or the empty string, DIDescriptor::getStringField
coalesces the two cases anyway so it's just a matter of legible/efficient
representation.

The change in behavior of the DICompileUnit::get* functions could be
subsumed by the full verification check - but ideally that should just be an
assertion if we could front-load the actual debug info metadata failure paths.

llvm-svn: 176907

Increase the cost of v8/v16-i8 to v8/v16-i32 casts and truncates as the backend
currently lowers those using stack accesses.

This was responsible for a significant degradation on
MultiSource/Benchmarks/Trimaran/enc-pc1/enc-pc1
where we vectorize one loop to a vector factor of 16. After this patch we select
a vector factor of 4 which will generate reasonable code.

unsigned char cle[32];

void test(short c) {
  unsigned short compte;
  for (compte = 0; compte <= 31; compte++) {
    cle[compte] = cle[compte] ^ c;
  }
}

radar://13220512

llvm-svn: 176898

llvm-svn: 176893

This gives us memory mapped file I/O on Windows.

llvm-svn: 176886