Remove warning for conditional operands of differend signedness from -Wsign-compare.  Cases that previously warn on this will have a different warning emitted from -Wsign-conversion.

llvm-svn: 135664

- Add more bitcasts for v16i16
- Since 135661 and 135662 already added the splat logic,
just add one more splat test for v16i16

llvm-svn: 135663

instruction introduced in AVX, which can operate on 128 and 256-bit vectors.
It considers a 256-bit vector as two independent 128-bit lanes. It can permute
any 32 or 64 elements inside a lane, and restricts the second lane to
have the same permutation of the first one. With the improved splat support
introduced early today, adding codegen for this instruction enable more
efficient 256-bit code:

Instead of:
  vextractf128  $0, %ymm0, %xmm0
  punpcklbw %xmm0, %xmm0
  punpckhbw %xmm0, %xmm0
  vinsertf128 $0, %xmm0, %ymm0, %ymm1
  vinsertf128 $1, %xmm0, %ymm1, %ymm0
  vextractf128  $1, %ymm0, %xmm1
  shufps  $1, %xmm1, %xmm1
  movss %xmm1, 28(%rsp)
  movss %xmm1, 24(%rsp)
  movss %xmm1, 20(%rsp)
  movss %xmm1, 16(%rsp)
  vextractf128  $0, %ymm0, %xmm0
  shufps  $1, %xmm0, %xmm0
  movss %xmm0, 12(%rsp)
  movss %xmm0, 8(%rsp)
  movss %xmm0, 4(%rsp)
  movss %xmm0, (%rsp)
  vmovaps (%rsp), %ymm0
We get:
  vextractf128  $0, %ymm0, %xmm0
  punpcklbw %xmm0, %xmm0
  punpckhbw %xmm0, %xmm0
  vinsertf128 $0, %xmm0, %ymm0, %ymm1
  vinsertf128 $1, %xmm0, %ymm1, %ymm0
  vpermilps $85, %ymm0, %ymm0

llvm-svn: 135662

refactor the code and add a bunch of comments. The final shuffle
emitted by handling 256-bit types is suitable for the VPERM shuffle
instruction which is going to be introduced in a next commit (with
a testcase which cover this commit)

llvm-svn: 135661

llvm-svn: 135660

llvm-svn: 135659

llvm-svn: 135658

llvm-svn: 135657

llvm-svn: 135656

If we are telling only one thread to run in debugserver, and that thread has been suspended from outside
the debugger, resume it before running so we will actually make progress.

llvm-svn: 135655

llvm-svn: 135654

essentials contains two small summaries that you might really want to use; lldb contains some basic summaries for use in debugging LLDB itself. to use them, you must type category enable lldb

llvm-svn: 135653

llvm-svn: 135652

Connor Wakamo!

llvm-svn: 135651

rdar://9786536

llvm-svn: 135650

access specifier as public.

llvm-svn: 135649

llvm-svn: 135648

llvm-svn: 135647

entities generated directly by the preprocessor from those loaded from
the external source (e.g., the ASTReader). By separating these two
sets of entities into different vectors, we allow both to grow
independently, and eliminate the need for preallocating all of the
loaded preprocessing entities. This is similar to the way the recent
SourceManager refactoring treats FileIDs and the source location
address space.

As part of this, switch over to building a continuous range map to
track preprocessing entities.

llvm-svn: 135646

llvm-svn: 135645

rdar://9786536

llvm-svn: 135644

Addressing code review comments for commit 135509 - Add FixItHints in case a C++ function call is missing * or & operators on

llvm-svn: 135643

llvm-svn: 135642

llvm-svn: 135641

llvm-svn: 135640

X86 is the only target that uses coff format. This should fixes test failures running on Windows, Cygwin, or MingW hosts.

llvm-svn: 135639

// pr10411

llvm-svn: 135638

llvm-svn: 135637

Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target.

llvm-svn: 135636

llvm-svn: 135635

llvm-svn: 135634

llvm-svn: 135633

llvm-svn: 135632

llvm-svn: 135631

llvm-svn: 135630

There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode.

llvm-svn: 135629

Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't.

llvm-svn: 135628

While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value.

llvm-svn: 135627

Move the shift operator and special value (32 encoded as 0 for PKHTB) handling
into the instruction printer. This cleans up a bit of the disassembler
special casing for these instructions, more easily handles not printing the
operand at all for "lsl #0" and prepares for correct asm parsing of these
operands.

llvm-svn: 135626

llvm-svn: 135625