llvm-svn: 133619

that takes an ArrayRef.

llvm-svn: 133615

llvm-svn: 133614

llvm-svn: 133613

llvm-svn: 133612

representing a constant reference to ValType. Normally this is just
"const ValType &", but when ValType is a std::vector we want to use
ArrayRef as the reference type.

llvm-svn: 133611

be one with only one unconditional branch and no phis. Duplicating the phis in this case
is possible, but requeres liveness analysis or breaking edges.

llvm-svn: 133607

llvm-svn: 133599

Patch by Wei-Ren Chen

llvm-svn: 133589

llvm-svn: 133569

llvm-svn: 133567

to emit "movd" across the board to continue supporting a Darwin assembler bug.
This is the reincarnation of r133452.

llvm-svn: 133565

llvm-svn: 133561

There could be more than one DBG_VALUE instructions for variables where all of them have offset based on one register.

llvm-svn: 133560

explanation of what the EH table describes.

llvm-svn: 133559

Noticed on inspection.

llvm-svn: 133553

llvm-svn: 133536

llvm-svn: 133533

This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using
the integrated assembler.

llvm-svn: 133524

Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the CBackend by emitting definitions for each intrinsic that occurs in the module.

llvm-svn: 133522

llvm-svn: 133518

llvm-svn: 133514

self-hosted build failure has been fixed (r133512).

llvm-svn: 133513

because it won't work after my phi operand changes, because the incoming
blocks will no longer be Uses.

llvm-svn: 133512

1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8)
   => (bswap x) >> 16
2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8))
   => (rotl (bswap x) 16)

This allows us to eliminate most of the def : Pat patterns for ARM rev16
revsh instructions. It catches many more cases for ARM and x86.

rdar://9609108

llvm-svn: 133503

ops.

This is a rewrite of the IV simplification algorithm used by
-disable-iv-rewrite. To avoid perturbing the default mode, I
temporarily split the driver and created SimplifyIVUsersNoRewrite. The
idea is to avoid doing opcode/pattern matching inside
IndVarSimplify. SCEV already does it. We want to optimize with the
full generality of SCEV, but optimize def-use chains top down on-demand rather
than rewriting the entire expression bottom-up. This was easy to do
for operations that SCEV can prove are identity function. So we're now
eliminating bitmasks and zero extends this way.

A result of this rewrite is that indvars -disable-iv-rewrite no longer
requires IVUsers.

llvm-svn: 133502

llvm-svn: 133499

handle functions with return type Complex long long.

llvm-svn: 133497

llvm-svn: 133496

llvm-svn: 133494

functions do not appear in the module.

llvm-svn: 133478

llvm-svn: 133473

llvm-svn: 133454

movd when assembling.

llvm-svn: 133452

llvm-svn: 133449

llvm-svn: 133447

llvm-svn: 133446

The current implementation generates stack loads/stores, which are
really just mov instructions from/to "special" registers.  This may
not be the most efficient implementation, compared to an approach where
the stack registers are directly folded into instructions, but this is
easier to implement and I have yet to see a case where ptxas is unable
to see through this kind of register usage and know what is really
going on.

llvm-svn: 133443

with 32bit values.

llvm-svn: 133439

Change PHINodes to store simple pointers to their incoming basic blocks,
instead of full-blown Uses.

Note that this loses an optimization in SplitCriticalEdge(), because we
can no longer walk the use list of a BasicBlock to find phi nodes. See
the comment I removed starting "However, the foreach loop is slow for
blocks with lots of predecessors".

Extend replaceAllUsesWith() on a BasicBlock to also update any phi
nodes in the block's successors. This mimics what would have happened
when PHINodes were proper Users of their incoming blocks. (Note that
this only works if OldBB->replaceAllUsesWith(NewBB) is called when
OldBB still has a terminator instruction, so it still has some
successors.)

llvm-svn: 133435