colliding with llvm/ADT/ValueMap.h:ValueMap<>.

llvm-svn: 85344

llvm-svn: 85341

Fixed a bug in the coalescer where intervals were occasionally merged despite a real interference. This fixes rdar://problem/7157961.

llvm-svn: 85338

llvm-svn: 85335

llvm-svn: 85334

default behind a command line option. This will enable better performance for
vectors on NEON enabled processors.

llvm-svn: 85333

llvm-svn: 85332

llvm-svn: 85331

llvm-svn: 85329

llvm-svn: 85327

llvm-svn: 85325

llvm-svn: 85323

llvm-svn: 85319

llvm-svn: 85318

llvm-svn: 85316

llvm-svn: 85312

llvm-svn: 85311

llvm-svn: 85299

Do not held on to DenseMap slot accross map insertion. The insertion may cause the map to grow rending the slot invalid.
Use this opportunity to use ValueMap instead of DenseMap.

llvm-svn: 85298

BL_pred and BLr9_pred.

llvm-svn: 85297

llvm-svn: 85296

http://llvm.org/PR5184, and beef up the comments to describe what both options
do and the risks of lazy compilation in the presence of threads.

llvm-svn: 85295

llvm-svn: 85286

Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.

llvm-svn: 85281

instruction format that already takes care of setting this.

llvm-svn: 85280

(assembler,asmprinter, bc reader+writer) and document it.  Codegen
currently aborts on it.

llvm-svn: 85274

for the r/rr fragment of the multiclass AI_unary_rrot/AI_bin_rrot.

llvm-svn: 85271

llvm-svn: 85257

llvm-svn: 85255

llvm-svn: 85254

thread safe either.

llvm-svn: 85253

llvm-svn: 85252

llvm-svn: 85235

with multiple return values it inserts a PHI to merge them all together.
However, if the return values are all the same, it ends up with a pointless
PHI and this pointless PHI happens to really block SRoA from happening in 
at least a silly C++ example written by Doug, but probably others.  This 
fixes rdar://7339069.

llvm-svn: 85206

llvm-svn: 85197

llvm-svn: 85192

do anything than return "I don't know" at the moment.

llvm-svn: 85189

llvm-svn: 85186

llvm-svn: 85185

Change Thumb1 and Thumb2 instructions to separate opcode from operands with a tab instead of a space.

llvm-svn: 85184