Original commit message:
Use the SSAUpdator to turn calls to eh.exception that are not in a
landing pad into uses of registers rather than loads from a stack
slot.  Doesn't touch the 'orrible hack code - Bill needs to persuade
me harder :)

llvm-svn: 112952

The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.

llvm-svn: 112944

llvm-svn: 112942

vabd intrinsic and add and/or zext operations.  In the case of vaba, this
also avoids the need for a DAG combine pattern to combine vabd with add.
Update tests.  Auto-upgrade the old intrinsics.

llvm-svn: 112941

llvm-svn: 112938

- Teach getShuffleScalarElt how to handle more target
specific nodes, so the DAGCombine can make use of it.
- Add another hack to avoid the node update problem
during legalization. More description on the comments

llvm-svn: 112934

llvm-svn: 112923

llvm-svn: 112921

llvm-svn: 112920

llvm-svn: 112919

stores.

llvm-svn: 112912

not a scrunched version of it.

llvm-svn: 112904

Patch by Cameron Esfahani!

llvm-svn: 112902

comments, these don't happen anymore.

llvm-svn: 112901

Thanks Chris!

llvm-svn: 112900

Remove #uses comments from functions: they we're padded out to column 50
and were potentially confusing for externally visible functions.

going further, remove the "<i8**> [#uses=3]" comments entirely. They
add a lot of noise, confuse people about what the IR is, and don't add 
any particular value.  When the types are long it makes it really really
hard to read IR.

If someone is interested in this sort of thing, the right way to do this
is to implement an AsmAnnotationWriter that produces the same output, and
add a flag to llvm-dis (only) to produce this output.

llvm-svn: 112899

llvm-svn: 112896

llvm-svn: 112895

and were potentially confusing for externally visible functions.

going further, remove the "<i8**> [#uses=3]" comments entirely. They
add a lot of noise, confuse people about what the IR is, and don't add 
any particular value.  When the types are long it makes it really really
hard to read IR.

If someone is interested in this sort of thing, the right way to do this
is to implement an AsmAnnotationWriter that produces the same output, and
add a flag to llvm-dis (only) to produce this output.

llvm-svn: 112894

I wasn't able to convince myself that all GetMainExecutable
implementations always return absolute paths; this prevents
unexpected behavior in case they ever don't.

llvm-svn: 112888

llvm-svn: 112885

large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs.

rdar://7352504
rdar://8374540
rdar://8355680

llvm-svn: 112883

llvm-svn: 112878

switches.  Just return the conservatively correct answer.

llvm-svn: 112876

Patch by Jan Sjodin!

llvm-svn: 112875

capacity and remove the workaround in SmallVector<T,0>.  There are some
theoretical benefits to a N->2N+1 growth policy anyway.

llvm-svn: 112870

Move decoding of insertps back to avoid unused warnings in x86 isel lowering, and fix movlhps/movhlps to decode 4 elements shuffles

llvm-svn: 112869

llvm-svn: 112864

there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.

This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.

llvm-svn: 112861

llvm-svn: 112858

llvm-svn: 112852

llvm-svn: 112849

llvm-svn: 112847

Move x86 specific shuffle mask decoding to its own header, it's also going to be used elsewhere. Also trim trailing whitespaces

llvm-svn: 112846

locally.

llvm-svn: 112845

Minix apparently doesn't like double-slash separators, and there's
no apparent need for them here.

llvm-svn: 112844

Fix a bug in LazyValueInfo that CorrelatedValuePropagation exposed: In the LVI lattice, undef and the full set ConstantRange should not
be treated as equivalent.

llvm-svn: 112843

llvm-svn: 112842

ARM register class allocation order functions to take advantage of that.

llvm-svn: 112841

llvm-svn: 112834