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  1. Nov 14, 2013
  2. Nov 13, 2013
  3. Nov 12, 2013
    • Matt Arsenault's avatar
      R600/SI: Change formatting of printed registers. · 72b31eee
      Matt Arsenault authored
      Print the range of registers used with a single letter prefix.
      This better matches what the shader compiler produces and
      is overall less obnoxious than concatenating all of the
      subregister names together.
      
      Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1,
      it will print s[0:1] and so on.
      
      There doesn't appear to be a straightforward way
      to get the actual register info in the InstPrinter,
      so this parses the generated name to print with the
      new syntax.
      
      The required test changes are pretty nasty, and register
      matching regexes are now worse. Since there isn't a way to
      add to a variable in FileCheck, some of the tests now don't
      check the exact number of registers used, but I don't think that
      will be a real problem.
      
      llvm-svn: 194443
      72b31eee
    • Matt Arsenault's avatar
      R600/SI: Add test that fails due to requiring i64 mul for pointers · dbf9f311
      Matt Arsenault authored
      llvm-svn: 194433
      dbf9f311
  4. Nov 11, 2013
  5. Nov 06, 2013
  6. Oct 31, 2013
  7. Oct 30, 2013
  8. Oct 29, 2013
  9. Oct 23, 2013
  10. Oct 22, 2013
    • Tom Stellard's avatar
      R600: Simplify handling of private address space · 26a3b67b
      Tom Stellard authored
      The AMDGPUIndirectAddressing pass was previously responsible for
      lowering private loads and stores to indirect addressing instructions.
      However, this pass was buggy and way too complicated.  The only
      advantage it had over the new simplified code was that it saved one
      instruction per direct write to private memory.  This optimization
      likely has a minimal impact on performance, and we may be able
      to duplicate it using some other transformation.
      
      For the private address space, we now:
      1. Lower private loads/store to Register(Load|Store) instructions
      2. Reserve part of the register file as 'private memory'
      3. After regalloc lower the Register(Load|Store) instructions to
         MOV instructions that use indirect addressing.
      
      llvm-svn: 193179
      26a3b67b
  11. Oct 21, 2013
  12. Oct 16, 2013
    • Tom Stellard's avatar
      R600: Fix a crash in the AMDILCFGStructurizer · b34186ae
      Tom Stellard authored
      We were calling llvm_unreachable() when failing to optimize the
      branch into if case.  However, it is still possible for us
      to structurize the CFG by duplicating blocks even if this optimization
      fails.
      
      Reviewed-by: Vincent Lejeune<vljn at ovi.com>
      llvm-svn: 192813
      b34186ae
  13. Oct 13, 2013
  14. Oct 11, 2013
  15. Oct 10, 2013
  16. Oct 08, 2013
  17. Oct 01, 2013
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  21. Sep 12, 2013
  22. Sep 06, 2013
  23. Sep 05, 2013
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