Move the loop vectorizer from O2 to O3. It looks like the increase in code size actually hurts the performance on many programs.

llvm-svn: 171471

llvm-svn: 171470

1. Add code to estimate register pressure.
2. Add code to select the unroll factor based on register pressure.
3. Add bits to TargetTransformInfo to provide the number of registers.

llvm-svn: 171469

Revert revision: 171467. This transformation is incorrect and makes some tests fail. Original message:

Simplified TRUNCATE operation that comes after SETCC. It is possible since SETCC result is 0 or -1.
Added a test.

llvm-svn: 171468

Added a test.

llvm-svn: 171467

Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks."

This reverts commit r171461 since it breaks the following tests:

Clang :: Analysis/outofbound-notwork.c
Clang :: Analysis/string-fail.c
Clang :: CXX/basic/basic.lookup/basic.lookup.qual/p6-0x.cpp
Clang :: CXX/basic/basic.lookup/basic.lookup.unqual/p15.cpp
Clang :: CXX/dcl.dcl/dcl.spec/dcl.fct.spec/p4.cpp
Clang :: CXX/dcl.dcl/dcl.spec/dcl.stc/p10.cpp
Clang :: CXX/temp/temp.param/p14.cpp
Clang :: CXX/temp/temp.res/temp.dep.res/temp.point/p1.cpp
Clang :: CodeGen/2009-02-13-zerosize-union-field-ppc.c
Clang :: CodeGen/blocks-2.c
Clang :: CodeGen/libcalls-d.c
Clang :: CodeGen/libcalls-ld.c
Clang :: CodeGenCXX/conversion-function.cpp
Clang :: CodeGenCXX/debug-info-limit-type.cpp
Clang :: CodeGenCXX/inheriting-constructor.cpp
Clang :: FixIt/fixit-errors.c
Clang :: FixIt/fixit-pmem.cpp
Clang :: Modules/namespaces.cpp
Clang :: PCH/changed-files.c
Clang :: PCH/pr4489.c
Clang :: PCH/source-manager-stack.c
Clang :: Parser/cxx-ambig-decl-expr-xfail.cpp
Clang :: SemaCXX/switch-implicit-fallthrough-cxx98.cpp
Clang :: SemaTemplate/instantiate-function-1.mm

llvm-svn: 171466

Changed two debug statements that state that a queue had finished being processed when said queue was really a list to state a list had finished being processed.

llvm-svn: 171465

llvm-svn: 171464

llvm-svn: 171463

Added DEBUG message for ObjCARC when an inline asm marker is inserted for architectures where this is required to perform a retainAutoreleasedReturnValue optimization.

llvm-svn: 171462

Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividing by 0. This is needed to keep early if conversion from moving them across basic blocks.

llvm-svn: 171461

llvm-svn: 171459

Users of LLVM_BUILTIN_UNREACHABLE should be responsible in the case when LLVM_BUILTIN_UNREACHABLE is undefined.

Actually, (0, (p)) in LLVM_ASSUME_ALIGNED(p, a) caused thousands of warnings on g++-4.4. It was a motivation in this commit.

llvm-svn: 171455

In order to cost subvector insertion and extraction, we need to know
the type of the subvector being extracted.

No functionality change.

llvm-svn: 171453

llvm-svn: 171450

llvm-svn: 171449

before the last time.

--- Reverse-merging r171442 into '.':
U    include/llvm/IR/Attributes.h
U    lib/IR/Attributes.cpp
U    lib/IR/AttributeImpl.h

llvm-svn: 171448

When Kind == (Broadcast or Reverse) then Index is not used; make it an optional parameter.

No functionality change.

llvm-svn: 171447

llvm-svn: 171446

llvm-svn: 171445

--- Reverse-merging r171441 into '.':
U    include/llvm/IR/Attributes.h
U    lib/IR/Attributes.cpp

llvm-svn: 171444

The 'operator==' method is a bit clearer and much less verbose for somethings
that should have only one value. Remove from the AttrBuilder for consistency.

llvm-svn: 171442

llvm-svn: 171441

They are failing because archives create unaligned ELF files. The recent
Endian change added a __builtin_unreachable() when this happens. I will be
committing a fix for this soon.

llvm-svn: 171438

llvm-svn: 171437

LoopVectorizer: Add support for loop-unrolling during vectorization for increasing the ILP. At the moment this feature is disabled by default and this commit should not cause any functional changes.

llvm-svn: 171436

Most IMPLICIT_DEF instructions are removed by the ProcessImplicitDefs
pass, and a few are reinserted by PHIElimination when a PHI argument is
<undef>.

RegisterCoalescer was assuming that all IMPLICIT_DEF live ranges look
like those created by PHIElimination, and that their live range never
leaves the basic block.

The PR14732 test case does tricks with PHI nodes that causes a longer
IMPLICIT_DEF live range to appear. This happens very rarely, but
RegisterCoalescer should be able to handle it.

llvm-svn: 171435

llvm-svn: 171434

llvm-svn: 171430

llvm-svn: 171429

sections for debug info. These are some of the dwo sections from the
DWARF5 split debug info proposal. Update the fission-cu.ll testcase
to show what we should be able to dump more of now.

Work in progress: Ultimately the relocations will be gone for the
dwo section and the strings will be a different form (as well as
the rest of the sections will be included).

llvm-svn: 171428

Modify the AttrBuilder class to store the attributes as a set instead of as a
bit mask. The Attribute class will represent only one attribute instead of a
collection of attributes.

This is the wave of the future!

llvm-svn: 171427

DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
mistakes:

1. It was checking the legality of scalar INT_TO_FP nodes and then generating
vector nodes.

2. It was passing the result value type to
TargetLoweringInfo::getOperationAction() when it should have been
passing the value type of the first operand.

llvm-svn: 171420

Patch by Michael M Kuperstein!

llvm-svn: 171414

Fixes Valgrind failures and removes bitwise operations that don't provide any benefit.
Valgrind failures reported by NAKAMURA Takumi.

llvm-svn: 171413

llvm-svn: 171408

* Add support for specifying the alignment to use.
* Add the concept of native endianness. Used for unaligned native types.

The native alignment and read/write simplification is based on a patch by Richard Smith.

llvm-svn: 171406

This defeats the include-guard optimization when parsing.

llvm-svn: 171405

- Fix a typo

llvm-svn: 171399

llvm-svn: 171398