by 40%, FreeBench/fourinarow by 20%, and many other programs 10-25%.

On PPC, this speeds up fourinarow by 18%, and probably other things as well.

llvm-svn: 31504

llvm-svn: 31500

llvm-svn: 31498

X86.  If happy, I'll enable this by default.

llvm-svn: 31493

llvm-svn: 31492

The low part goes in the first operand of expandop, not the second one.

llvm-svn: 31487

llvm-svn: 31478

NOTE: There doesn't seem to be consistency for whether a leading tab
is present in a section heading.

llvm-svn: 31475

llvm-svn: 31474

llvm-svn: 31473

llvm-svn: 31464

llvm-svn: 31459

llvm-svn: 31458

their scope are being deleted.  Workaround is to widen scope to full function.

llvm-svn: 31454

llvm-svn: 31453

there may be other def(s) apart from the use&def two-address operand. We need
to check if the register reuse for a use&def operand may conflicts with another
def. Provide a mean to recover from the conflict if it is detected when the
defs are processed later.

llvm-svn: 31439

llvm-svn: 31419

llvm-svn: 31417

llvm-svn: 31414

llvm-svn: 31413

llvm-svn: 31412

llvm-svn: 31410

llvm-svn: 31409

llvm-svn: 31408

llvm-svn: 31397

llvm-svn: 31387

1. Hash not quite right for DIEValues.

2. Not going to use Usage (no significant benefit.)

llvm-svn: 31384

llvm-svn: 31382

Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380

General clean up of teh dwarf writer.

1. Most significant is the folding of debug information entries.  This
reduced self hosted -g SelectionDAGISel.s from 120M to 13M and pretty
close to matching .o file sizes with gcc.

2. Debug information entry printing for debugging the dwarf code.

3. Bring all the code closer to llvm standards.

4. Misc. fixes and doc clean ups.

llvm-svn: 31379

Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369

no fixes physreg.  Treat this as permission to use any register in the register
class.  When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time.  This eliminates a ton
of copies around common inline asms.  For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31366

llvm-svn: 31364

Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together.

llvm-svn: 31363

llvm-svn: 31359

llvm-svn: 31356

it inserts an uncond branch where it is less likely to cause a problem.  This
fixes some perf issues on ppc.

llvm-svn: 31354

llvm-svn: 31347

llvm-svn: 31340

tail is not an entire block for either of them, pick one, split it, then
merge the common part.

llvm-svn: 31336