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  1. Sep 10, 2010
    • Evan Cheng's avatar
      Teach if-converter to be more careful with predicating instructions that would · bf407075
      Evan Cheng authored
      take multiple cycles to decode.
      For the current if-converter clients (actually only ARM), the instructions that
      are predicated on false are not nops. They would still take machine cycles to
      decode. Micro-coded instructions such as LDM / STM can potentially take multiple
      cycles to decode. If-converter should take treat them as non-micro-coded
      simple instructions.
      
      llvm-svn: 113570
      bf407075
  2. Aug 06, 2010
  3. Jul 15, 2010
  4. Jun 19, 2010
    • Evan Cheng's avatar
      Allow ARM if-converter to be run after post allocation scheduling. · 2d51c7c5
      Evan Cheng authored
      - This fixed a number of bugs in if-converter, tail merging, and post-allocation
        scheduler. If-converter now runs branch folding / tail merging first to
        maximize if-conversion opportunities.
      - Also changed the t2IT instruction slightly. It now defines the ITSTATE
        register which is read by instructions in the IT block.
      - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't
        change the instruction ordering in the IT block (since IT mask has been
        finalized). It also ensures no other instructions can be scheduled between
        instructions in the IT block.
      
      This is not yet enabled.
      
      llvm-svn: 106344
      2d51c7c5
  5. Jun 14, 2010
  6. Jun 12, 2010
  7. May 21, 2010
    • Evan Cheng's avatar
      - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs · 3858451e
      Evan Cheng authored
      that are aliases of the specified register.
      - Rename modifiesRegister to definesRegister since it's looking a def of the
      specific register or one of its super-registers. It's not looking for def of a
      sub-register or alias that could change the specified register.
      - Added modifiesRegister to look for defs of aliases.
      
      llvm-svn: 104377
      3858451e
  8. May 20, 2010
  9. May 14, 2010
  10. May 01, 2010
  11. Apr 17, 2010
  12. Apr 12, 2010
  13. Mar 05, 2010
  14. Jan 05, 2010
  15. Dec 09, 2009
  16. Dec 03, 2009
  17. Nov 20, 2009
  18. Nov 13, 2009
  19. Nov 12, 2009
  20. Nov 10, 2009
  21. Nov 05, 2009
  22. Nov 03, 2009
  23. Oct 31, 2009
    • Dan Gohman's avatar
      Make -print-machineinstrs more readable. · 34341e69
      Dan Gohman authored
       - Be consistent when referring to MachineBasicBlocks: BB#0.
       - Be consistent when referring to virtual registers: %reg1024.
       - Be consistent when referring to unknown physical registers: %physreg10.
       - Be consistent when referring to known physical registers: %RAX
       - Be consistent when referring to register 0: %reg0
       - Be consistent when printing alignments: align=16
       - Print jump table contents.
       - Don't print host addresses, in general.
       - and various other cleanups.
      
      llvm-svn: 85682
      34341e69
  24. Oct 28, 2009
  25. Oct 26, 2009
  26. Oct 25, 2009
  27. Oct 23, 2009
  28. Oct 21, 2009
  29. Oct 20, 2009
  30. Oct 16, 2009
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