llvm-svn: 99840

llvm-svn: 99836

llvm-svn: 99833

not stop it by using RAII.

llvm-svn: 99832

This is same as r99772 (which was reverted) with just one meaningful difference where two source lines exchanged their positions.

llvm-svn: 99816

llvm-svn: 99778

llvm-svn: 99774

llvm-svn: 99772

and those derived from them.  These are obnoxious because
they were written as: PatLeaf<(bitconvert).  Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)

llvm-svn: 99759

llvm-svn: 99742

are cleaned up, we can remove an old fixme.

llvm-svn: 99741

1, 1 cases which are by-far the most frequent.  This shrinks the X86
isel table from 77014 -> 74657 bytes.

llvm-svn: 99740

can cause a crash on crazy situations in msp430 when morph-node-to
is disabled.

llvm-svn: 99739

list multiple times when MorphNodeTo can't be applied.

llvm-svn: 99735

scope due to obviously false predicate.

llvm-svn: 99723

llvm-svn: 99697

llvm-svn: 99695

converted, then use the initializer, since using the name itself won't work.

llvm-svn: 99692

'invoke' instruction. You will get a situation like this:

bb:
  %ehptr = eh.exception()
  %sel = eh.selector(%ehptr, @per, 0);

...

bb2:
  invoke _Unwind_Resume_or_Rethrow(%ehptr) %normal unwind to %lpad

lpad:
  ...

The unwinder will see the %sel call as a clean-up and, if it doesn't have a
catch further up the call stack, it will skip running it. But there *is* another
catch up the stack -- the catch for the %lpad. However, we can't see that. This
is fixed in code-gen, where we detect this situation, and convert the "clean-up"
selector call into a "catch-all" selector call. This gives us the correct
semantics.

llvm-svn: 99671

llvm-svn: 99656

llvm-svn: 99637

LiveVariables should clear kill / dead markers first. This allows us to remove a hack in the scheduler.

llvm-svn: 99597

Try trivial remat before the coalescer gives up on a vr / physreg coalescing for fear of tying up a physical register.

llvm-svn: 99575

llvm-svn: 99573

llvm-svn: 99544

the custom insertion hook deletes the instruction, then we try to set dead
flags on it.  Neither the code that I added nor the code that was there 
before was safe.

llvm-svn: 99538

llvm-svn: 99537

llvm-svn: 99507

Scheduler assumes SDDbgValue nodes are in source order. That's true currently. But add an assertion to verify it.

llvm-svn: 99501

bytes instead of one byte.  This is important because
we're running up to too many opcodes to fit in a byte
and it is aggrevated by FIRST_TARGET_MEMORY_OPCODE
making the numbering sparse.  This just bites the
bullet and bloats out the table.  In practice, this
increases the size of the x86 isel table from 74.5K
to 76K.  I think we'll cope :)

This fixes rdar://7791648

llvm-svn: 99494

llvm-svn: 99489

llvm-svn: 99487

happening.

Enhance scheduling to set the DEAD flag on implicit defs
more aggressively.  Before, we'd set an implicit def operand
to dead if it were present in the SDNode corresponding to
the machineinstr but had no use.  Now we do it in this case
AND if the implicit def does not exist in the SDNode at all.

This exposes a couple of problems: one is the FIXME, which
causes a live intervals crash on CodeGen/X86/sibcall.ll.
The second is that it makes machinecse and licm more 
aggressive (which is a good thing) but also exposes a case
where licm hoists a set0 and then it doesn't get resunk.

Talking to codegen folks about both these issues, but I need
this patch in in the meantime.

llvm-svn: 99485

r99453.

llvm-svn: 99482

Change how dbg_value sdnodes are converted into machine instructions. Their placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers.

Here is a theoretical example that illustrates why the placement is important.

tmp1 = 
store tmp1 -> x
...
tmp2 = add ...
...
call
...
store tmp2 -> x

Now mem2reg comes along:

tmp1 = 
dbg_value (tmp1 -> x)
...
tmp2 = add ...
...
call
...
dbg_value (tmp2 -> x)

When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1.

Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers").

This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed.

llvm-svn: 99469

llvm-svn: 99465

2006-07-19-stwbrx-crash.ll for me, but it's the only likely
patch in the blame list of several bots.  Lets see if this
fixes it.

llvm-svn: 99453

llvm-svn: 99445

llvm-svn: 99444

llvm-svn: 99429