llvm-svn: 54266

No functionality change.

llvm-svn: 54265

llvm-svn: 54264

llvm-svn: 54262

 - Just added prints for all the action functions. Ideally this would
   be extended to print all the information for the actions.

llvm-svn: 54259

 - There is an miscompilation issue remaining due to a poor
   interaction between the delayed emission of static functions and
   the emission of constructors, but that already existed prior to
   this change.

llvm-svn: 54258

 - Including possible priority argument
 - In other news, the attribute parsing code really needs a cleanup

llvm-svn: 54257

Enhanced path-sensitive return-of-stack-address check to print out the name of the variable whose address was returned.

llvm-svn: 54253

llvm-svn: 54251

llvm-svn: 54250

the default legalizer.

llvm-svn: 54249

switches use the binary search algorithm) for
environments that don't support it.  PPC64 JIT
is such an environment; turn the flag on for that.

llvm-svn: 54248

llvm-svn: 54247

llvm-svn: 54244

http://llvm.org/viewvc/llvm-project?view=rev&revision=54107

llvm-svn: 54242

different address spaces) for llvm r54195.

llvm-svn: 54241

llvm-svn: 54239

<rdar://problem/6113085>

llvm-svn: 54237

access).
Added pattern to match bitconvert node.
Fixed MTC1 asm string bug.

llvm-svn: 54229

it isn't always visible to gdb.

llvm-svn: 54228

empty structs. This fixes PR2612.

llvm-svn: 54226

Use existing LiveInterval methods to simplify live interval merging.  Thanks to Evan for pointing these out.

llvm-svn: 54225

of movzbw here.

llvm-svn: 54224

subreg form on x86-64, to avoid the problem with x86-32
having GPRs that don't have 8-bit subregs.

Also, change several 16-bit instructions to use 
equivalent 32-bit instructions. These have a smaller
encoding and avoid partial-register updates.

llvm-svn: 54223

llvm-svn: 54222

llvm-svn: 54220

llvm-svn: 54219

llvm-svn: 54218

llvm-svn: 54215

llvm-svn: 54214

llvm-svn: 54213

llvm-svn: 54212

instead of mapping the decl to a bitcast of the global to the correct
type.
 
 - GetAddrOf{Function,GlobalVar} introduce the bitcast on every use now.

 - This solves a problem where a dangling pointer could be introduced
   by the RAUW done when replacing a forward or tentative
   definition. See testcase for more details.

 - Fixes <rdar://problem/6108358>

llvm-svn: 54211

llvm-svn: 54210

llvm-svn: 54209

to different address spaces.  This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32

llvm-svn: 54195

time applying to the implicit comparison in smin expressions. The 
correct way to transform an inequality into the opposite 
inequality, either signed or unsigned, is with a not expression.

I looked through the SCEV code, and I don't think there are any more 
occurrences of this issue.

llvm-svn: 54194

llvm-svn: 54186

When merging live intervals, we also need to merge in any live ranges that are inputs to two-address instructions
that themselves define a range we already care about.

llvm-svn: 54185

SGT exit condition.  Essentially, the correct way to flip an inequality 
in 2's complement is the not operator, not the negation operator.  
That said, the difference only affects cases involving INT_MIN.

Also, enhance the pre-test search logic to be a bit smarter about 
inequalities flipped with a not operator, so it can eliminate the smax 
from the iteration count for simple loops.

llvm-svn: 54184